[OpenWrt-Devel] [PATCH 5/7] sunxi: Make sunxi patches apply with kernel 4.19
Hauke Mehrtens
hauke at hauke-m.de
Thu Dec 27 06:08:40 EST 2018
This makes the patches and configuration copied from kernel 4.14 apply
and work with kernel 4.19.
Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
---
target/linux/sunxi/Makefile | 2 +-
target/linux/sunxi/config-4.19 | 52 +-
target/linux/sunxi/cortexa53/config-4.19 | 45 +-
target/linux/sunxi/cortexa7/config-4.19 | 7 +-
target/linux/sunxi/cortexa8/config-4.19 | 17 +-
...dwmac-mdio-MDIOs-are-automatically-r.patch | 33 --
...-sun8i-Handle-integrated-external-MD.patch | 506 ------------------
...stmmac-sun8i-Restore-the-compatibles.patch | 35 --
...-sun8i-fix-allwinner-leds-active-low.patch | 29 -
...ts-sunxi-Restore-EMAC-changes-boards.patch | 292 ----------
...dts-sunxi-h3-h5-Restore-EMAC-changes.patch | 54 --
...-h5-represent-the-mdio-switch-used-b.patch | 59 --
...s-allwinner-A64-Restore-EMAC-changes.patch | 184 -------
...ner-add-snps-dwmac-mdio-compatible-t.patch | 28 -
...ts-allwinner-H5-Restore-EMAC-changes.patch | 120 -----
...a64-add-Ethernet-PHY-regulator-for-s.patch | 51 --
...s-sun8i-add-support-for-Orange-Pi-R1.patch | 105 ----
...i-support-for-nanopi-neo-plus2-board.patch | 242 ---------
...n8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch | 48 --
...s-sun8i-activate-SPI-on-Orange-Pi-R1.patch | 29 -
.../220-ARM-dts-orange-pi-zero-plus.patch | 185 -------
...angepi_pc2_usb_otg_to_host_key_power.patch | 4 +-
...un7i-Add-BCM53125-switch-nodes-to-th.patch | 2 +-
23 files changed, 58 insertions(+), 2071 deletions(-)
delete mode 100644 target/linux/sunxi/patches-4.19/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
delete mode 100644 target/linux/sunxi/patches-4.19/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
delete mode 100644 target/linux/sunxi/patches-4.19/003-net-stmmac-sun8i-Restore-the-compatibles.patch
delete mode 100644 target/linux/sunxi/patches-4.19/004-net-stmmac-dwmac-sun8i-fix-allwinner-leds-active-low.patch
delete mode 100644 target/linux/sunxi/patches-4.19/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
delete mode 100644 target/linux/sunxi/patches-4.19/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
delete mode 100644 target/linux/sunxi/patches-4.19/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
delete mode 100644 target/linux/sunxi/patches-4.19/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
delete mode 100644 target/linux/sunxi/patches-4.19/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
delete mode 100644 target/linux/sunxi/patches-4.19/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
delete mode 100644 target/linux/sunxi/patches-4.19/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
delete mode 100644 target/linux/sunxi/patches-4.19/060-ARM-dts-sun8i-add-support-for-Orange-Pi-R1.patch
delete mode 100644 target/linux/sunxi/patches-4.19/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch
delete mode 100644 target/linux/sunxi/patches-4.19/201-ARM-dts-sun8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch
delete mode 100644 target/linux/sunxi/patches-4.19/202-ARM-dts-sun8i-activate-SPI-on-Orange-Pi-R1.patch
delete mode 100644 target/linux/sunxi/patches-4.19/220-ARM-dts-orange-pi-zero-plus.patch
diff --git a/target/linux/sunxi/Makefile b/target/linux/sunxi/Makefile
index 8d09d4e939..cd1bf30e84 100644
--- a/target/linux/sunxi/Makefile
+++ b/target/linux/sunxi/Makefile
@@ -14,7 +14,7 @@ FEATURES:=fpu usb ext4 display rtc squashfs
SUBTARGETS:=cortexa8 cortexa7 cortexa53
MAINTAINER:=Zoltan HERPAI <wigyori at uid0.hu>
-KERNEL_PATCHVER:=4.14
+KERNEL_PATCHVER:=4.19
KERNELNAME:=zImage dtbs
# A10: Cortex-A8
diff --git a/target/linux/sunxi/config-4.19 b/target/linux/sunxi/config-4.19
index c13b1452ee..042b2e8986 100644
--- a/target/linux/sunxi/config-4.19
+++ b/target/linux/sunxi/config-4.19
@@ -2,9 +2,15 @@
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_ARCH_AXXIA is not set
CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_ARCH_HAS_PHYS_TO_DMA=y
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_SG_CHAIN=y
@@ -15,16 +21,13 @@ CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
-# CONFIG_ARCH_MULTI_CPU_AUTO is not set
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_NR_GPIO=416
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
-CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
-# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
-# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
CONFIG_ARCH_SUNXI=y
+CONFIG_ARCH_SUNXI_MC_SMP=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
@@ -40,9 +43,14 @@ CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
# CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND is not set
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
+CONFIG_ARM_CCI=y
+CONFIG_ARM_CCI400_COMMON=y
+CONFIG_ARM_CCI400_PORT_CTRL=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_ERRATA_643719=y
CONFIG_ARM_GIC=y
+CONFIG_ARM_GIC_V3=y
+CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_HEAVY_MB=y
CONFIG_ARM_L1_CACHE_SHIFT=6
@@ -139,7 +147,6 @@ CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEBUG_MEMORY_INIT=y
-# CONFIG_DEBUG_UART_8250 is not set
# CONFIG_DEBUG_USER is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
@@ -162,7 +169,6 @@ CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_ELF_CORE=y
CONFIG_ENABLE_MUST_CHECK=y
-# CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_EXT4_FS=y
CONFIG_EXTCON=y
# CONFIG_F2FS_CHECK_FS is not set
@@ -179,7 +185,6 @@ CONFIG_FB_CMDLINE=y
CONFIG_FB_FOREIGN_ENDIAN=y
CONFIG_FB_LITTLE_ENDIAN=y
CONFIG_FB_MODE_HELPERS=y
-# CONFIG_FB_PROVIDE_GET_FB_UNMAPPED_AREA is not set
CONFIG_FB_SIMPLE=y
CONFIG_FB_TILEBLITTING=y
CONFIG_FIXED_PHY=y
@@ -193,6 +198,7 @@ CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_FRAME_WARN=2048
CONFIG_FREEZER=y
+CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ALLOCATOR=y
@@ -203,11 +209,13 @@ CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
-CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
@@ -218,34 +226,29 @@ CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GLOB=y
CONFIG_GPIOLIB=y
-CONFIG_GPIO_AXP209=y
CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_HAVE_ARCH_BITREVERSE=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_HAVE_ARM_SMCCC=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
@@ -263,8 +266,10 @@ CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y
CONFIG_HAVE_KVM_EVENTFD=y
CONFIG_HAVE_KVM_IRQCHIP=y
CONFIG_HAVE_KVM_IRQFD=y
+CONFIG_HAVE_KVM_IRQ_BYPASS=y
CONFIG_HAVE_KVM_IRQ_ROUTING=y
CONFIG_HAVE_KVM_MSI=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
@@ -276,6 +281,7 @@ CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SMP=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
@@ -308,9 +314,9 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_IOMMU_HELPER=y
CONFIG_IOSCHED_CFQ=y
CONFIG_IRQCHIP=y
+CONFIG_IRQ_BYPASS_MANAGER=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
@@ -331,6 +337,7 @@ CONFIG_LEDS_GPIO=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOGO=y
CONFIG_LOGO_LINUX_CLUT224=y
@@ -347,6 +354,7 @@ CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_SUN4I=y
CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEMFD_CREATE=y
# CONFIG_MFD_AC100 is not set
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
@@ -364,7 +372,6 @@ CONFIG_MMU_NOTIFIER=y
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MTD is not set
-CONFIG_MULTI_IRQ_HANDLER=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEON=y
@@ -387,6 +394,7 @@ CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OF_RESERVED_MEM=y
@@ -397,8 +405,7 @@ CONFIG_OUTER_CACHE_SYNC=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PARTITION_ADVANCED is not set
-# CONFIG_PCI_DOMAINS_GENERIC is not set
-# CONFIG_PCI_SYSCALL is not set
+CONFIG_PARTITION_PERCPU=y
CONFIG_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=3
@@ -407,11 +414,9 @@ CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PHY_SUN4I_USB=y
CONFIG_PHY_SUN9I_USB=y
CONFIG_PINCTRL=y
+CONFIG_PINCTRL_AXP209=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_SUN4I_A10=y
-# CONFIG_PINCTRL_SUN50I_A64 is not set
-# CONFIG_PINCTRL_SUN50I_A64_R is not set
-# CONFIG_PINCTRL_SUN50I_H5 is not set
CONFIG_PINCTRL_SUN5I=y
CONFIG_PINCTRL_SUN6I_A31=y
CONFIG_PINCTRL_SUN6I_A31_R=y
@@ -455,6 +460,7 @@ CONFIG_RATIONAL=y
# CONFIG_RCU_BOOST is not set
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
+CONFIG_REFCOUNT_FULL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_IRQ=y
@@ -466,13 +472,13 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RELAY=y
CONFIG_RESET_CONTROLLER=y
+CONFIG_RESET_SIMPLE=y
CONFIG_RESET_SUNXI=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_SATA_PMP=y
-# CONFIG_SCHED_INFO is not set
CONFIG_SCSI=y
CONFIG_SDIO_UART=y
CONFIG_SECURITYFS=y
@@ -536,7 +542,6 @@ CONFIG_SWCONFIG_B53=y
CONFIG_SWCONFIG_B53_PHY_DRIVER=y
CONFIG_SWCONFIG_B53_PHY_FIXUP=y
# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
-CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYSFS_SYSCALL=y
@@ -576,7 +581,6 @@ CONFIG_USB_SUPPORT=y
CONFIG_USERIO=y
CONFIG_USE_OF=y
CONFIG_VDSO=y
-CONFIG_VECTORS_BASE=0xffff0000
CONFIG_VFAT_FS=y
CONFIG_VFP=y
CONFIG_VFPv3=y
diff --git a/target/linux/sunxi/cortexa53/config-4.19 b/target/linux/sunxi/cortexa53/config-4.19
index 58aca5c868..819a51e243 100644
--- a/target/linux/sunxi/cortexa53/config-4.19
+++ b/target/linux/sunxi/cortexa53/config-4.19
@@ -1,22 +1,23 @@
CONFIG_64BIT=y
-CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
-CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
-CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
+CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=24
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SUPPORTS_INT128=y
CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
+CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
+CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
@@ -30,8 +31,9 @@ CONFIG_ARM64_CONT_SHIFT=4
# CONFIG_ARM64_LSE_ATOMICS is not set
CONFIG_ARM64_PAGE_SHIFT=12
# CONFIG_ARM64_PAN is not set
+CONFIG_ARM64_PA_BITS=48
+CONFIG_ARM64_PA_BITS_48=y
# CONFIG_ARM64_PMEM is not set
-# CONFIG_ARM64_PTDUMP_CORE is not set
# CONFIG_ARM64_PTDUMP_DEBUGFS is not set
# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
CONFIG_ARM64_SSBD=y
@@ -42,52 +44,44 @@ CONFIG_ARM64_VA_BITS_39=y
# CONFIG_ARM64_VA_BITS_48 is not set
# CONFIG_ARM64_VHE is not set
CONFIG_ARM_AMBA=y
-CONFIG_ARM_GIC_V3=y
# CONFIG_ARM_SP805_WATCHDOG is not set
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
# CONFIG_COMPAT is not set
+CONFIG_DMA_DIRECT_OPS=y
CONFIG_DWMAC_SUN8I=y
+# CONFIG_FLATMEM_MANUAL is not set
CONFIG_FRAME_POINTER=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CSUM=y
CONFIG_GENERIC_IRQ_MIGRATION=y
-CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
CONFIG_HAVE_ARCH_HUGE_VMAP=y
CONFIG_HAVE_ARCH_KASAN=y
+CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
CONFIG_HAVE_ARCH_VMAP_STACK=y
CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_HAVE_CMPXCHG_LOCAL=y
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
+CONFIG_HAVE_KVM_VCPU_RUN_PID_CHANGE=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_HAVE_PATA_PLATFORM=y
CONFIG_HOLES_IN_ZONE=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_KERNEL_MODE_NEON=y
CONFIG_KVM_ARM_PMU=y
+CONFIG_KVM_INDIRECT_VECTORS=y
CONFIG_MDIO_BUS_MUX=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NO_IOPORT_MAP=y
# CONFIG_NUMA is not set
-CONFIG_PARTITION_PERCPU=y
-# CONFIG_PCI_DOMAINS is not set
-# CONFIG_PINCTRL_SUN4I_A10 is not set
CONFIG_PINCTRL_SUN50I_A64=y
CONFIG_PINCTRL_SUN50I_A64_R=y
CONFIG_PINCTRL_SUN50I_H5=y
-# CONFIG_PINCTRL_SUN5I is not set
-# CONFIG_PINCTRL_SUN6I_A31 is not set
-# CONFIG_PINCTRL_SUN6I_A31_R is not set
-# CONFIG_PINCTRL_SUN8I_A23 is not set
-# CONFIG_PINCTRL_SUN8I_A23_R is not set
-# CONFIG_PINCTRL_SUN8I_A33 is not set
-# CONFIG_PINCTRL_SUN8I_A83T is not set
-# CONFIG_PINCTRL_SUN8I_A83T_R is not set
-# CONFIG_PINCTRL_SUN8I_H3 is not set
-# CONFIG_PINCTRL_SUN8I_V3S is not set
-# CONFIG_PINCTRL_SUN9I_A80 is not set
-# CONFIG_PINCTRL_SUN9I_A80_R is not set
+CONFIG_PINCTRL_SUN50I_H6=y
+CONFIG_PINCTRL_SUN50I_H6_R=y
+CONFIG_QUEUED_RWLOCKS=y
+CONFIG_QUEUED_SPINLOCKS=y
# CONFIG_RANDOMIZE_BASE is not set
CONFIG_REALTEK_PHY=y
# CONFIG_SERIAL_AMBA_PL011 is not set
@@ -98,7 +92,12 @@ CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SUN50I_A64_CCU=y
+CONFIG_SUN50I_DE2_BUS=y
+CONFIG_SUN50I_H6_CCU=y
+CONFIG_SUN50I_H6_R_CCU=y
+CONFIG_SWIOTLB=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_VMAP_STACK=y
+CONFIG_ZONE_DMA32=y
diff --git a/target/linux/sunxi/cortexa7/config-4.19 b/target/linux/sunxi/cortexa7/config-4.19
index ee8873e081..aa9f1825b4 100644
--- a/target/linux/sunxi/cortexa7/config-4.19
+++ b/target/linux/sunxi/cortexa7/config-4.19
@@ -1,10 +1,5 @@
CONFIG_DWMAC_SUN8I=y
-CONFIG_HARDEN_BRANCH_PREDICTOR=y
# CONFIG_MACH_SUN4I is not set
# CONFIG_MACH_SUN5I is not set
-# CONFIG_PINCTRL_GR8 is not set
-# CONFIG_PINCTRL_SUN4I_A10 is not set
-# CONFIG_PINCTRL_SUN5I_A10S is not set
-# CONFIG_PINCTRL_SUN5I_A13 is not set
CONFIG_MDIO_BUS_MUX=y
-# CONFIG_PINCTRL_SUN5I is not set
+CONFIG_REGULATOR_SY8106A=y
diff --git a/target/linux/sunxi/cortexa8/config-4.19 b/target/linux/sunxi/cortexa8/config-4.19
index 6cbb4417f6..63833d858e 100644
--- a/target/linux/sunxi/cortexa8/config-4.19
+++ b/target/linux/sunxi/cortexa8/config-4.19
@@ -1,4 +1,3 @@
-# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
# CONFIG_ARM_ERRATA_643719 is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_MACH_SUN6I is not set
@@ -6,16 +5,6 @@
# CONFIG_MACH_SUN8I is not set
# CONFIG_MACH_SUN9I is not set
CONFIG_PGTABLE_LEVELS=2
-# CONFIG_PHYS_ADDR_T_64BIT is not set
-# CONFIG_PINCTRL_SUN6I_A31 is not set
-# CONFIG_PINCTRL_SUN6I_A31_R is not set
-# CONFIG_PINCTRL_SUN8I_A23 is not set
-# CONFIG_PINCTRL_SUN8I_A23_R is not set
-# CONFIG_PINCTRL_SUN8I_A33 is not set
-# CONFIG_PINCTRL_SUN8I_A83T is not set
-# CONFIG_PINCTRL_SUN8I_A83T_R is not set
-# CONFIG_PINCTRL_SUN8I_H3 is not set
-# CONFIG_PINCTRL_SUN8I_H3_R is not set
-# CONFIG_PINCTRL_SUN8I_V3S is not set
-# CONFIG_PINCTRL_SUN9I_A80 is not set
-# CONFIG_PINCTRL_SUN9I_A80_R is not set
+# CONFIG_PHY_SUN9I_USB is not set
+# CONFIG_SPI_SUN6I is not set
+# CONFIG_SUN8I_A83T_CCU is not set
diff --git a/target/linux/sunxi/patches-4.19/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch b/target/linux/sunxi/patches-4.19/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
deleted file mode 100644
index 838b234717..0000000000
--- a/target/linux/sunxi/patches-4.19/001-net-stmmac-snps-dwmac-mdio-MDIOs-are-automatically-r.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-From b5beecb580376cd8d959eb990abece6a748a3ce3 Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 24 Oct 2017 19:57:12 +0200
-Subject: [PATCH] net: stmmac: snps, dwmac-mdio MDIOs are automatically
- registered
-
-stmmac bindings docs said that its mdio node must have
-compatible = "snps,dwmac-mdio";
-Since dwmac-sun8i does not have any good reasons to not doing it, all
-their MDIO node must have it.
-
-Since these compatible is automatically registered, dwmac-sun8i compatible
-does not need to be in need_mdio_ids.
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Signed-off-by: David S. Miller <davem at davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ----
- 1 file changed, 4 deletions(-)
-
---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
-@@ -317,10 +317,6 @@ static int stmmac_dt_phy(struct plat_stm
- bool mdio = true;
- static const struct of_device_id need_mdio_ids[] = {
- { .compatible = "snps,dwc-qos-ethernet-4.10" },
-- { .compatible = "allwinner,sun8i-a83t-emac" },
-- { .compatible = "allwinner,sun8i-h3-emac" },
-- { .compatible = "allwinner,sun8i-v3s-emac" },
-- { .compatible = "allwinner,sun50i-a64-emac" },
- {},
- };
-
diff --git a/target/linux/sunxi/patches-4.19/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch b/target/linux/sunxi/patches-4.19/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
deleted file mode 100644
index 8e0527f3d8..0000000000
--- a/target/linux/sunxi/patches-4.19/002-net-stmmac-dwmac-sun8i-Handle-integrated-external-MD.patch
+++ /dev/null
@@ -1,506 +0,0 @@
-From 634db83b82658f4641d8026e340c6027cf74a6bb Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 24 Oct 2017 19:57:13 +0200
-Subject: [PATCH] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
-
-The Allwinner H3 SoC have two distinct MDIO bus, only one could be
-active at the same time.
-The selection of the active MDIO bus are done via some bits in the EMAC
-register of the system controller.
-
-This patch implement this MDIO switch via a custom MDIO-mux.
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Reviewed-by: Andrew Lunn <andrew at lunn.ch>
-Signed-off-by: David S. Miller <davem at davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++--------
- 2 files changed, 224 insertions(+), 130 deletions(-)
-
---- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
-+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
-@@ -159,6 +159,7 @@ config DWMAC_SUN8I
- tristate "Allwinner sun8i GMAC support"
- default ARCH_SUNXI
- depends on OF && (ARCH_SUNXI || COMPILE_TEST)
-+ select MDIO_BUS_MUX
- ---help---
- Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
-
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-@@ -17,6 +17,7 @@
- #include <linux/clk.h>
- #include <linux/io.h>
- #include <linux/iopoll.h>
-+#include <linux/mdio-mux.h>
- #include <linux/mfd/syscon.h>
- #include <linux/module.h>
- #include <linux/of_device.h>
-@@ -41,14 +42,14 @@
- * This value is used for disabling properly EMAC
- * and used as a good starting value in case of the
- * boot process(uboot) leave some stuff.
-- * @internal_phy: Does the MAC embed an internal PHY
-+ * @soc_has_internal_phy: Does the MAC embed an internal PHY
- * @support_mii: Does the MAC handle MII
- * @support_rmii: Does the MAC handle RMII
- * @support_rgmii: Does the MAC handle RGMII
- */
- struct emac_variant {
- u32 default_syscon_value;
-- int internal_phy;
-+ bool soc_has_internal_phy;
- bool support_mii;
- bool support_rmii;
- bool support_rgmii;
-@@ -61,7 +62,8 @@ struct emac_variant {
- * @rst_ephy: reference to the optional EPHY reset for the internal PHY
- * @variant: reference to the current board variant
- * @regmap: regmap for using the syscon
-- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
-+ * @internal_phy_powered: Does the internal PHY is enabled
-+ * @mux_handle: Internal pointer used by mdio-mux lib
- */
- struct sunxi_priv_data {
- struct clk *tx_clk;
-@@ -70,12 +72,13 @@ struct sunxi_priv_data {
- struct reset_control *rst_ephy;
- const struct emac_variant *variant;
- struct regmap *regmap;
-- bool use_internal_phy;
-+ bool internal_phy_powered;
-+ void *mux_handle;
- };
-
- static const struct emac_variant emac_variant_h3 = {
- .default_syscon_value = 0x58000,
-- .internal_phy = PHY_INTERFACE_MODE_MII,
-+ .soc_has_internal_phy = true,
- .support_mii = true,
- .support_rmii = true,
- .support_rgmii = true
-@@ -83,20 +86,20 @@ static const struct emac_variant emac_va
-
- static const struct emac_variant emac_variant_v3s = {
- .default_syscon_value = 0x38000,
-- .internal_phy = PHY_INTERFACE_MODE_MII,
-+ .soc_has_internal_phy = true,
- .support_mii = true
- };
-
- static const struct emac_variant emac_variant_a83t = {
- .default_syscon_value = 0,
-- .internal_phy = 0,
-+ .soc_has_internal_phy = false,
- .support_mii = true,
- .support_rgmii = true
- };
-
- static const struct emac_variant emac_variant_a64 = {
- .default_syscon_value = 0,
-- .internal_phy = 0,
-+ .soc_has_internal_phy = false,
- .support_mii = true,
- .support_rmii = true,
- .support_rgmii = true
-@@ -195,6 +198,9 @@ static const struct emac_variant emac_va
- #define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */
- #define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */
- #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
-+#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
-+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1
-+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2
-
- /* H3/A64 specific bits */
- #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
-@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmm
- return 0;
- }
-
-+/* Search in mdio-mux node for internal PHY node and get its clk/reset */
-+static int get_ephy_nodes(struct stmmac_priv *priv)
-+{
-+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
-+ struct device_node *mdio_mux, *iphynode;
-+ struct device_node *mdio_internal;
-+ int ret;
-+
-+ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
-+ if (!mdio_mux) {
-+ dev_err(priv->device, "Cannot get mdio-mux node\n");
-+ return -ENODEV;
-+ }
-+
-+ mdio_internal = of_find_compatible_node(mdio_mux, NULL,
-+ "allwinner,sun8i-h3-mdio-internal");
-+ if (!mdio_internal) {
-+ dev_err(priv->device, "Cannot get internal_mdio node\n");
-+ return -ENODEV;
-+ }
-+
-+ /* Seek for internal PHY */
-+ for_each_child_of_node(mdio_internal, iphynode) {
-+ gmac->ephy_clk = of_clk_get(iphynode, 0);
-+ if (IS_ERR(gmac->ephy_clk))
-+ continue;
-+ gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL);
-+ if (IS_ERR(gmac->rst_ephy)) {
-+ ret = PTR_ERR(gmac->rst_ephy);
-+ if (ret == -EPROBE_DEFER)
-+ return ret;
-+ continue;
-+ }
-+ dev_info(priv->device, "Found internal PHY node\n");
-+ return 0;
-+ }
-+ return -ENODEV;
-+}
-+
-+static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
-+{
-+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
-+ int ret;
-+
-+ if (gmac->internal_phy_powered) {
-+ dev_warn(priv->device, "Internal PHY already powered\n");
-+ return 0;
-+ }
-+
-+ dev_info(priv->device, "Powering internal PHY\n");
-+ ret = clk_prepare_enable(gmac->ephy_clk);
-+ if (ret) {
-+ dev_err(priv->device, "Cannot enable internal PHY\n");
-+ return ret;
-+ }
-+
-+ /* Make sure the EPHY is properly reseted, as U-Boot may leave
-+ * it at deasserted state, and thus it may fail to reset EMAC.
-+ */
-+ reset_control_assert(gmac->rst_ephy);
-+
-+ ret = reset_control_deassert(gmac->rst_ephy);
-+ if (ret) {
-+ dev_err(priv->device, "Cannot deassert internal phy\n");
-+ clk_disable_unprepare(gmac->ephy_clk);
-+ return ret;
-+ }
-+
-+ gmac->internal_phy_powered = true;
-+
-+ return 0;
-+}
-+
-+static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
-+{
-+ if (!gmac->internal_phy_powered)
-+ return 0;
-+
-+ clk_disable_unprepare(gmac->ephy_clk);
-+ reset_control_assert(gmac->rst_ephy);
-+ gmac->internal_phy_powered = false;
-+ return 0;
-+}
-+
-+/* MDIO multiplexing switch function
-+ * This function is called by the mdio-mux layer when it thinks the mdio bus
-+ * multiplexer needs to switch.
-+ * 'current_child' is the current value of the mux register
-+ * 'desired_child' is the value of the 'reg' property of the target child MDIO
-+ * node.
-+ * The first time this function is called, current_child == -1.
-+ * If current_child == desired_child, then the mux is already set to the
-+ * correct bus.
-+ */
-+static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
-+ void *data)
-+{
-+ struct stmmac_priv *priv = data;
-+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
-+ u32 reg, val;
-+ int ret = 0;
-+ bool need_power_ephy = false;
-+
-+ if (current_child ^ desired_child) {
-+ regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®);
-+ switch (desired_child) {
-+ case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID:
-+ dev_info(priv->device, "Switch mux to internal PHY");
-+ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
-+
-+ need_power_ephy = true;
-+ break;
-+ case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID:
-+ dev_info(priv->device, "Switch mux to external PHY");
-+ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
-+ need_power_ephy = false;
-+ break;
-+ default:
-+ dev_err(priv->device, "Invalid child ID %x\n",
-+ desired_child);
-+ return -EINVAL;
-+ }
-+ regmap_write(gmac->regmap, SYSCON_EMAC_REG, val);
-+ if (need_power_ephy) {
-+ ret = sun8i_dwmac_power_internal_phy(priv);
-+ if (ret)
-+ return ret;
-+ } else {
-+ sun8i_dwmac_unpower_internal_phy(gmac);
-+ }
-+ /* After changing syscon value, the MAC need reset or it will
-+ * use the last value (and so the last PHY set).
-+ */
-+ ret = sun8i_dwmac_reset(priv);
-+ }
-+ return ret;
-+}
-+
-+static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)
-+{
-+ int ret;
-+ struct device_node *mdio_mux;
-+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
-+
-+ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux");
-+ if (!mdio_mux)
-+ return -ENODEV;
-+
-+ ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn,
-+ &gmac->mux_handle, priv, priv->mii);
-+ return ret;
-+}
-+
- static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
- {
- struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
-@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct
- "Current syscon value is not the default %x (expect %x)\n",
- val, reg);
-
-- if (gmac->variant->internal_phy) {
-- if (!gmac->use_internal_phy) {
-- /* switch to external PHY interface */
-- reg &= ~H3_EPHY_SELECT;
-- } else {
-- reg |= H3_EPHY_SELECT;
-- reg &= ~H3_EPHY_SHUTDOWN;
-- dev_dbg(priv->device, "Select internal_phy %x\n", reg);
--
-- if (of_property_read_bool(priv->plat->phy_node,
-- "allwinner,leds-active-low"))
-- reg |= H3_EPHY_LED_POL;
-- else
-- reg &= ~H3_EPHY_LED_POL;
--
-- /* Force EPHY xtal frequency to 24MHz. */
-- reg |= H3_EPHY_CLK_SEL;
--
-- ret = of_mdio_parse_addr(priv->device,
-- priv->plat->phy_node);
-- if (ret < 0) {
-- dev_err(priv->device, "Could not parse MDIO addr\n");
-- return ret;
-- }
-- /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
-- * address. No need to mask it again.
-- */
-- reg |= ret << H3_EPHY_ADDR_SHIFT;
-+ if (gmac->variant->soc_has_internal_phy) {
-+ if (of_property_read_bool(priv->plat->phy_node,
-+ "allwinner,leds-active-low"))
-+ reg |= H3_EPHY_LED_POL;
-+ else
-+ reg &= ~H3_EPHY_LED_POL;
-+
-+ /* Force EPHY xtal frequency to 24MHz. */
-+ reg |= H3_EPHY_CLK_SEL;
-+
-+ ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node);
-+ if (ret < 0) {
-+ dev_err(priv->device, "Could not parse MDIO addr\n");
-+ return ret;
- }
-+ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY
-+ * address. No need to mask it again.
-+ */
-+ reg |= 1 << H3_EPHY_ADDR_SHIFT;
- }
-
- if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) {
-@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(str
- regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg);
- }
-
--static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv)
-+static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
- {
-- struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
-- int ret;
--
-- if (!gmac->use_internal_phy)
-- return 0;
-+ struct sunxi_priv_data *gmac = priv;
-
-- ret = clk_prepare_enable(gmac->ephy_clk);
-- if (ret) {
-- dev_err(priv->device, "Cannot enable ephy\n");
-- return ret;
-+ if (gmac->variant->soc_has_internal_phy) {
-+ /* sun8i_dwmac_exit could be called with mdiomux uninit */
-+ if (gmac->mux_handle)
-+ mdio_mux_uninit(gmac->mux_handle);
-+ if (gmac->internal_phy_powered)
-+ sun8i_dwmac_unpower_internal_phy(gmac);
- }
-
-- /* Make sure the EPHY is properly reseted, as U-Boot may leave
-- * it at deasserted state, and thus it may fail to reset EMAC.
-- */
-- reset_control_assert(gmac->rst_ephy);
--
-- ret = reset_control_deassert(gmac->rst_ephy);
-- if (ret) {
-- dev_err(priv->device, "Cannot deassert ephy\n");
-- clk_disable_unprepare(gmac->ephy_clk);
-- return ret;
-- }
--
-- return 0;
--}
--
--static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac)
--{
-- if (!gmac->use_internal_phy)
-- return 0;
--
-- clk_disable_unprepare(gmac->ephy_clk);
-- reset_control_assert(gmac->rst_ephy);
-- return 0;
--}
--
--/* sun8i_power_phy() - Activate the PHY:
-- * In case of error, no need to call sun8i_unpower_phy(),
-- * it will be called anyway by sun8i_dwmac_exit()
-- */
--static int sun8i_power_phy(struct stmmac_priv *priv)
--{
-- int ret;
--
-- ret = sun8i_dwmac_power_internal_phy(priv);
-- if (ret)
-- return ret;
--
-- ret = sun8i_dwmac_set_syscon(priv);
-- if (ret)
-- return ret;
--
-- /* After changing syscon value, the MAC need reset or it will use
-- * the last value (and so the last PHY set.
-- */
-- ret = sun8i_dwmac_reset(priv);
-- if (ret)
-- return ret;
-- return 0;
--}
--
--static void sun8i_unpower_phy(struct sunxi_priv_data *gmac)
--{
- sun8i_dwmac_unset_syscon(gmac);
-- sun8i_dwmac_unpower_internal_phy(gmac);
--}
--
--static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv)
--{
-- struct sunxi_priv_data *gmac = priv;
-
-- sun8i_unpower_phy(gmac);
-+ reset_control_put(gmac->rst_ephy);
-
- clk_disable_unprepare(gmac->tx_clk);
-
-@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwm
- if (!mac)
- return NULL;
-
-- ret = sun8i_power_phy(priv);
-+ ret = sun8i_dwmac_set_syscon(priv);
- if (ret)
- return NULL;
-
-@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct plat
- struct sunxi_priv_data *gmac;
- struct device *dev = &pdev->dev;
- int ret;
-+ struct stmmac_priv *priv;
-+ struct net_device *ndev;
-
- ret = stmmac_get_platform_resources(pdev, &stmmac_res);
- if (ret)
-@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct plat
- }
-
- plat_dat->interface = of_get_phy_mode(dev->of_node);
-- if (plat_dat->interface == gmac->variant->internal_phy) {
-- dev_info(&pdev->dev, "Will use internal PHY\n");
-- gmac->use_internal_phy = true;
-- gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
-- if (IS_ERR(gmac->ephy_clk)) {
-- ret = PTR_ERR(gmac->ephy_clk);
-- dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret);
-- return -EINVAL;
-- }
--
-- gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL);
-- if (IS_ERR(gmac->rst_ephy)) {
-- ret = PTR_ERR(gmac->rst_ephy);
-- if (ret == -EPROBE_DEFER)
-- return ret;
-- dev_err(&pdev->dev, "No EPHY reset control found %d\n",
-- ret);
-- return -EINVAL;
-- }
-- } else {
-- dev_info(&pdev->dev, "Will use external PHY\n");
-- gmac->use_internal_phy = false;
-- }
-
- /* platform data specifying hardware features and callbacks.
- * hardware features were copied from Allwinner drivers.
-@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct plat
-
- ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
- if (ret)
-- sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
-+ goto dwmac_exit;
-+
-+ ndev = dev_get_drvdata(&pdev->dev);
-+ priv = netdev_priv(ndev);
-+ /* The mux must be registered after parent MDIO
-+ * so after stmmac_dvr_probe()
-+ */
-+ if (gmac->variant->soc_has_internal_phy) {
-+ ret = get_ephy_nodes(priv);
-+ if (ret)
-+ goto dwmac_exit;
-+ ret = sun8i_dwmac_register_mdio_mux(priv);
-+ if (ret) {
-+ dev_err(&pdev->dev, "Failed to register mux\n");
-+ goto dwmac_mux;
-+ }
-+ } else {
-+ ret = sun8i_dwmac_reset(priv);
-+ if (ret)
-+ goto dwmac_exit;
-+ }
-
- return ret;
-+dwmac_mux:
-+ sun8i_dwmac_unset_syscon(gmac);
-+dwmac_exit:
-+ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv);
-+return ret;
- }
-
- static const struct of_device_id sun8i_dwmac_match[] = {
diff --git a/target/linux/sunxi/patches-4.19/003-net-stmmac-sun8i-Restore-the-compatibles.patch b/target/linux/sunxi/patches-4.19/003-net-stmmac-sun8i-Restore-the-compatibles.patch
deleted file mode 100644
index 2f43585053..0000000000
--- a/target/linux/sunxi/patches-4.19/003-net-stmmac-sun8i-Restore-the-compatibles.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From a8ff8ccb45d37efa64476958fc5e9a8d9716b23b Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 24 Oct 2017 19:57:14 +0200
-Subject: [PATCH] net: stmmac: sun8i: Restore the compatibles
-
-The original dwmac-sun8i DT bindings have some issue on how to handle
-integrated PHY and was reverted in last RC of 4.13.
-But now we have a solution so we need to get back that was reverted.
-
-This patch restore compatibles about dwmac-sun8i
-This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Signed-off-by: David S. Miller <davem at davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-@@ -1072,6 +1072,14 @@ return ret;
- }
-
- static const struct of_device_id sun8i_dwmac_match[] = {
-+ { .compatible = "allwinner,sun8i-h3-emac",
-+ .data = &emac_variant_h3 },
-+ { .compatible = "allwinner,sun8i-v3s-emac",
-+ .data = &emac_variant_v3s },
-+ { .compatible = "allwinner,sun8i-a83t-emac",
-+ .data = &emac_variant_a83t },
-+ { .compatible = "allwinner,sun50i-a64-emac",
-+ .data = &emac_variant_a64 },
- { }
- };
- MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
diff --git a/target/linux/sunxi/patches-4.19/004-net-stmmac-dwmac-sun8i-fix-allwinner-leds-active-low.patch b/target/linux/sunxi/patches-4.19/004-net-stmmac-dwmac-sun8i-fix-allwinner-leds-active-low.patch
deleted file mode 100644
index b8b5b53b3f..0000000000
--- a/target/linux/sunxi/patches-4.19/004-net-stmmac-dwmac-sun8i-fix-allwinner-leds-active-low.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 1c08ac0c4bd8e9d66c4dde29bc496c3b430dd028 Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 28 Nov 2017 17:48:22 +0100
-Subject: net: stmmac: dwmac-sun8i: fix allwinner,leds-active-low handling
-
-The driver expect "allwinner,leds-active-low" to be in PHY node, but
-the binding doc expect it to be in MAC node.
-
-Since all board DT use it also in MAC node, the driver need to search
-allwinner,leds-active-low in MAC node.
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Signed-off-by: David S. Miller <davem at davemloft.net>
----
- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 +--
- 1 file changed, 1 insertion(+), 2 deletions(-)
-
---- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
-@@ -808,8 +808,7 @@ static int sun8i_dwmac_set_syscon(struct
- val, reg);
-
- if (gmac->variant->soc_has_internal_phy) {
-- if (of_property_read_bool(priv->plat->phy_node,
-- "allwinner,leds-active-low"))
-+ if (of_property_read_bool(node, "allwinner,leds-active-low"))
- reg |= H3_EPHY_LED_POL;
- else
- reg &= ~H3_EPHY_LED_POL;
diff --git a/target/linux/sunxi/patches-4.19/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch b/target/linux/sunxi/patches-4.19/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
deleted file mode 100644
index b89278d5d3..0000000000
--- a/target/linux/sunxi/patches-4.19/020-ARM-dts-sunxi-Restore-EMAC-changes-boards.patch
+++ /dev/null
@@ -1,292 +0,0 @@
-From 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 31 Oct 2017 09:19:12 +0100
-Subject: [PATCH] ARM: dts: sunxi: Restore EMAC changes (boards)
-
-The original dwmac-sun8i DT bindings have some issue on how to handle
-integrated PHY and was reverted in last RC of 4.13.
-But now we have a solution so we need to get back that was reverted.
-
-This patch restore all boards DT about dwmac-sun8i
-This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Acked-by: Florian Fainelli <f.fainelli at gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 +++++++
- arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++++++++++++++
- arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 29 +++++++++++++++++++++++
- arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 ++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 +++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 ++++
- arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 +++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++++++++++++++++
- arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 +++++++++++++
- 10 files changed, 131 insertions(+)
-
---- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
-@@ -56,6 +56,8 @@
-
- aliases {
- serial0 = &uart0;
-+ /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
-+ ethernet0 = &emac;
- ethernet1 = &xr819;
- };
-
-@@ -102,6 +104,13 @@
- status = "okay";
- };
-
-+&emac {
-+ phy-handle = <&int_mii_phy>;
-+ phy-mode = "mii";
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
- &mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>;
---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
-@@ -52,6 +52,7 @@
- compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- serial1 = &uart1;
- };
-@@ -114,6 +115,24 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <0>;
-+ };
-+};
-+
- &ir {
- pinctrl-names = "default";
- pinctrl-0 = <&ir_pins_a>;
---- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
-@@ -45,6 +45,16 @@
- / {
- model = "FriendlyArm NanoPi M1 Plus";
- compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3";
-+
-+ reg_gmac_3v3: gmac-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "gmac-3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ startup-delay-us = <100000>;
-+ enable-active-high;
-+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
-+ };
- };
-
- &ehci1 {
-@@ -55,6 +65,25 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+
-+ allwinner,leds-active-low;
-+
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <7>;
-+ };
-+};
-+
- &ohci1 {
- status = "okay";
- };
---- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
-@@ -46,3 +46,10 @@
- model = "FriendlyARM NanoPi NEO";
- compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
- };
-+
-+&emac {
-+ phy-handle = <&int_mii_phy>;
-+ phy-mode = "mii";
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
-@@ -54,6 +54,7 @@
- aliases {
- serial0 = &uart0;
- /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
-+ ethernet0 = &emac;
- ethernet1 = &rtl8189;
- };
-
-@@ -117,6 +118,13 @@
- status = "okay";
- };
-
-+&emac {
-+ phy-handle = <&int_mii_phy>;
-+ phy-mode = "mii";
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
- &ir {
- pinctrl-names = "default";
- pinctrl-0 = <&ir_pins_a>;
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
-@@ -52,6 +52,7 @@
- compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- };
-
-@@ -97,6 +98,13 @@
- status = "okay";
- };
-
-+&emac {
-+ phy-handle = <&int_mii_phy>;
-+ phy-mode = "mii";
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
- &mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
-@@ -53,6 +53,11 @@
- };
- };
-
-+&emac {
-+ /* LEDs changed to active high on the plus */
-+ /delete-property/ allwinner,leds-active-low;
-+};
-+
- &mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins_a>;
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
-@@ -52,6 +52,7 @@
- compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- };
-
-@@ -113,6 +114,13 @@
- status = "okay";
- };
-
-+&emac {
-+ phy-handle = <&int_mii_phy>;
-+ phy-mode = "mii";
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
- &ir {
- pinctrl-names = "default";
- pinctrl-0 = <&ir_pins_a>;
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts
-@@ -47,6 +47,10 @@
- model = "Xunlong Orange Pi Plus / Plus 2";
- compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
-
-+ aliases {
-+ ethernet0 = &emac;
-+ };
-+
- reg_gmac_3v3: gmac-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "gmac-3v3";
-@@ -74,6 +78,24 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+
-+ allwinner,leds-active-low;
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <0>;
-+ };
-+};
-+
- &mmc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_8bit_pins>;
---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
-+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
-@@ -61,3 +61,19 @@
- gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
- };
- };
-+
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
diff --git a/target/linux/sunxi/patches-4.19/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.19/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
deleted file mode 100644
index 9e7319b4c8..0000000000
--- a/target/linux/sunxi/patches-4.19/021-arm-dts-sunxi-h3-h5-Restore-EMAC-changes.patch
+++ /dev/null
@@ -1,54 +0,0 @@
-From 4b236a0fe51259ccde06aed046fe20bfe6e25dce Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 31 Oct 2017 09:19:10 +0100
-Subject: [PATCH] arm: dts: sunxi: h3/h5: Restore EMAC changes
-
-The original dwmac-sun8i DT bindings have some issue on how to handle
-integrated PHY and was reverted in last RC of 4.13.
-But now we have a solution so we need to get back that was reverted.
-
-This patch restore sunxi-h3-h5.dtsi
-This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Acked-by: Florian Fainelli <f.fainelli at gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
-+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
-@@ -391,6 +391,32 @@
- clocks = <&osc24M>;
- };
-
-+ emac: ethernet at 1c30000 {
-+ compatible = "allwinner,sun8i-h3-emac";
-+ syscon = <&syscon>;
-+ reg = <0x01c30000 0x10000>;
-+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "macirq";
-+ resets = <&ccu RST_BUS_EMAC>;
-+ reset-names = "stmmaceth";
-+ clocks = <&ccu CLK_BUS_EMAC>;
-+ clock-names = "stmmaceth";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ status = "disabled";
-+
-+ mdio: mdio {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ int_mii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ clocks = <&ccu CLK_BUS_EPHY>;
-+ resets = <&ccu RST_BUS_EPHY>;
-+ };
-+ };
-+ };
-+
- spi0: spi at 01c68000 {
- compatible = "allwinner,sun8i-h3-spi";
- reg = <0x01c68000 0x1000>;
diff --git a/target/linux/sunxi/patches-4.19/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch b/target/linux/sunxi/patches-4.19/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
deleted file mode 100644
index 2db4f13609..0000000000
--- a/target/linux/sunxi/patches-4.19/022-ARM-dts-sunxi-h3-h5-represent-the-mdio-switch-used-b.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 776245ae02f63ba2b94596b892c597676e190e78 Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 31 Oct 2017 09:19:11 +0100
-Subject: [PATCH] ARM: dts: sunxi: h3/h5: represent the mdio switch used by
- sun8i-h3-emac
-
-Since dwmac-sun8i could use either an integrated PHY or an external PHY
-(which could be at same MDIO address), we need to represent this selection
-by a MDIO switch.
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Acked-by: Florian Fainelli <f.fainelli at gmail.com>
-Reviewed-by: Andrew Lunn <andrew at lunn.ch>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++----
- 1 file changed, 27 insertions(+), 4 deletions(-)
-
---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
-+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
-@@ -408,11 +408,34 @@
- mdio: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
-- int_mii_phy: ethernet-phy at 1 {
-- compatible = "ethernet-phy-ieee802.3-c22";
-+ compatible = "snps,dwmac-mdio";
-+ };
-+
-+ mdio-mux {
-+ compatible = "allwinner,sun8i-h3-mdio-mux";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ mdio-parent-bus = <&mdio>;
-+ /* Only one MDIO is usable at the time */
-+ internal_mdio: mdio at 1 {
-+ compatible = "allwinner,sun8i-h3-mdio-internal";
- reg = <1>;
-- clocks = <&ccu CLK_BUS_EPHY>;
-- resets = <&ccu RST_BUS_EPHY>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ int_mii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ clocks = <&ccu CLK_BUS_EPHY>;
-+ resets = <&ccu RST_BUS_EPHY>;
-+ };
-+ };
-+
-+ external_mdio: mdio at 2 {
-+ reg = <2>;
-+ #address-cells = <1>;
-+ #size-cells = <0>;
- };
- };
- };
diff --git a/target/linux/sunxi/patches-4.19/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.19/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
deleted file mode 100644
index af4a921583..0000000000
--- a/target/linux/sunxi/patches-4.19/025-arm64-dts-allwinner-A64-Restore-EMAC-changes.patch
+++ /dev/null
@@ -1,184 +0,0 @@
-From 94f442886711c6c4f4383a1c5a6994a788ba05d8 Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 31 Oct 2017 09:19:13 +0100
-Subject: [PATCH] arm64: dts: allwinner: A64: Restore EMAC changes
-
-The original dwmac-sun8i DT bindings have some issue on how to handle
-integrated PHY and was reverted in last RC of 4.13.
-But now we have a solution so we need to get back that was reverted.
-
-This patch restore arm64 DT about dwmac-sun8i for A64
-This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Acked-by: Florian Fainelli <f.fainelli at gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++++++++++++++++
- .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 +++++++++++++++
- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +++++++++++++++++
- .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++++++++++++++++
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 ++++++++++++++++++++
- 5 files changed, 84 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-@@ -51,6 +51,7 @@
- compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- serial1 = &uart1;
- };
-@@ -69,6 +70,14 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&rgmii_pins>;
-+ phy-mode = "rgmii";
-+ phy-handle = <&ext_rgmii_phy>;
-+ status = "okay";
-+};
-+
- &i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
-@@ -79,6 +88,13 @@
- bias-pull-up;
- };
-
-+&mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
-+
- &mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>;
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
-@@ -48,3 +48,18 @@
-
- /* TODO: Camera, touchscreen, etc. */
- };
-+
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&rgmii_pins>;
-+ phy-mode = "rgmii";
-+ phy-handle = <&ext_rgmii_phy>;
-+ status = "okay";
-+};
-+
-+&mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -51,6 +51,7 @@
- compatible = "pine64,pine64", "allwinner,sun50i-a64";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- serial1 = &uart1;
- serial2 = &uart2;
-@@ -71,6 +72,15 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&rmii_pins>;
-+ phy-mode = "rmii";
-+ phy-handle = <&ext_rmii_phy1>;
-+ status = "okay";
-+
-+};
-+
- &i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins>;
-@@ -81,6 +91,13 @@
- bias-pull-up;
- };
-
-+&mdio {
-+ ext_rmii_phy1: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
-+
- &mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins>;
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-@@ -53,6 +53,7 @@
- "allwinner,sun50i-a64";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- };
-
-@@ -76,6 +77,21 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&rgmii_pins>;
-+ phy-mode = "rgmii";
-+ phy-handle = <&ext_rgmii_phy>;
-+ status = "okay";
-+};
-+
-+&mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
-+
- &mmc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc2_pins>;
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -449,6 +449,26 @@
- #size-cells = <0>;
- };
-
-+ emac: ethernet at 1c30000 {
-+ compatible = "allwinner,sun50i-a64-emac";
-+ syscon = <&syscon>;
-+ reg = <0x01c30000 0x10000>;
-+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "macirq";
-+ resets = <&ccu RST_BUS_EMAC>;
-+ reset-names = "stmmaceth";
-+ clocks = <&ccu CLK_BUS_EMAC>;
-+ clock-names = "stmmaceth";
-+ status = "disabled";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ mdio: mdio {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ };
-+ };
-+
- gic: interrupt-controller at 1c81000 {
- compatible = "arm,gic-400";
- reg = <0x01c81000 0x1000>,
diff --git a/target/linux/sunxi/patches-4.19/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch b/target/linux/sunxi/patches-4.19/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
deleted file mode 100644
index 40efc9f3e8..0000000000
--- a/target/linux/sunxi/patches-4.19/026-arm64-dts-allwinner-add-snps-dwmac-mdio-compatible-t.patch
+++ /dev/null
@@ -1,28 +0,0 @@
-From 16416084e06e1ebff51a9e7721a8cc4ccc186f28 Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 31 Oct 2017 09:19:15 +0100
-Subject: [PATCH] arm64: dts: allwinner: add snps,dwmac-mdio compatible to
- emac/mdio
-
-stmmac bindings docs said that its mdio node must have
-compatible = "snps,dwmac-mdio";
-Since dwmac-sun8i does not have any good reasons to not doing it, all
-their MDIO node must have it.
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Acked-by: Florian Fainelli <f.fainelli at gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
-@@ -464,6 +464,7 @@
- #size-cells = <0>;
-
- mdio: mdio {
-+ compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- };
diff --git a/target/linux/sunxi/patches-4.19/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch b/target/linux/sunxi/patches-4.19/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
deleted file mode 100644
index b2c9d75ad7..0000000000
--- a/target/linux/sunxi/patches-4.19/027-arm64-dts-allwinner-H5-Restore-EMAC-changes.patch
+++ /dev/null
@@ -1,120 +0,0 @@
-From 44a94c7ef989317de81e3e7f84385be2bf1b5fe2 Mon Sep 17 00:00:00 2001
-From: Corentin Labbe <clabbe.montjoie at gmail.com>
-Date: Tue, 31 Oct 2017 09:19:14 +0100
-Subject: [PATCH] arm64: dts: allwinner: H5: Restore EMAC changes
-
-The original dwmac-sun8i DT bindings have some issue on how to handle
-integrated PHY and was reverted in last RC of 4.13.
-But now we have a solution so we need to get back that was reverted.
-
-This patch restore arm64 DT about dwmac-sun8i for H5
-This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")
-
-Signed-off-by: Corentin Labbe <clabbe.montjoie at gmail.com>
-Acked-by: Florian Fainelli <f.fainelli at gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++
- .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++
- .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +++++++++++++++++
- 3 files changed, 51 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
-@@ -50,6 +50,7 @@
- compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- };
-
-@@ -108,6 +109,22 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 7 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <7>;
-+ };
-+};
-+
- &mmc0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
-@@ -59,6 +59,7 @@
- };
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- };
-
-@@ -136,6 +137,22 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
-+
- &ir {
- pinctrl-names = "default";
- pinctrl-0 = <&ir_pins_a>;
---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
-@@ -54,6 +54,7 @@
- compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
-
- aliases {
-+ ethernet0 = &emac;
- serial0 = &uart0;
- };
-
-@@ -143,6 +144,22 @@
- status = "okay";
- };
-
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
-+
- &ir {
- pinctrl-names = "default";
- pinctrl-0 = <&ir_pins_a>;
diff --git a/target/linux/sunxi/patches-4.19/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch b/target/linux/sunxi/patches-4.19/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
deleted file mode 100644
index 295fff2e74..0000000000
--- a/target/linux/sunxi/patches-4.19/030-arm64-allwinner-a64-add-Ethernet-PHY-regulator-for-s.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From bdfe4cebea11476d278b1b98dd0f7cdac8269d62 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy at aosc.io>
-Date: Fri, 10 Nov 2017 17:26:54 +0800
-Subject: [PATCH] arm64: allwinner: a64: add Ethernet PHY regulator for several
- boards
-
-On several A64 boards the Ethernet PHY is powered by the DC1SW regulator
-on the AXP803 PMIC.
-
-Add phy-handle property to these boards' emac node.
-
-Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
-Acked-by: Corentin LABBE <clabbe.montjoie at gmail.com>
-Tested-by: Corentin LABBE <clabbe.montjoie at gmail.com>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 +
- arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 +
- arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 +
- 3 files changed, 3 insertions(+)
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
-@@ -75,6 +75,7 @@
- pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
- phy-handle = <&ext_rgmii_phy>;
-+ phy-supply = <®_dc1sw>;
- status = "okay";
- };
-
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
-@@ -77,6 +77,7 @@
- pinctrl-0 = <&rmii_pins>;
- phy-mode = "rmii";
- phy-handle = <&ext_rmii_phy1>;
-+ phy-supply = <®_dc1sw>;
- status = "okay";
-
- };
---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
-@@ -82,6 +82,7 @@
- pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
- phy-handle = <&ext_rgmii_phy>;
-+ phy-supply = <®_dc1sw>;
- status = "okay";
- };
-
diff --git a/target/linux/sunxi/patches-4.19/060-ARM-dts-sun8i-add-support-for-Orange-Pi-R1.patch b/target/linux/sunxi/patches-4.19/060-ARM-dts-sun8i-add-support-for-Orange-Pi-R1.patch
deleted file mode 100644
index e9d448792c..0000000000
--- a/target/linux/sunxi/patches-4.19/060-ARM-dts-sun8i-add-support-for-Orange-Pi-R1.patch
+++ /dev/null
@@ -1,105 +0,0 @@
-From 74942cd5dfe4ac4fd982fe58118bc69346a2bd18 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy at aosc.io>
-Date: Sun, 12 Nov 2017 20:41:29 +0800
-Subject: [PATCH] ARM: dts: sun8i: add support for Orange Pi R1
-
-Orange Pi R1 is a board design based on Orange Pi Zero, with XR819 Wi-Fi
-chip replaced by RTL8189ETV Wi-Fi module and the USB Type-A jack
-replaced by an onboard USB RTL8152B USB-Ethernet adapter.
-
-Add support for it.
-
-Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
-Signed-off-by: Maxime Ripard <maxime.ripard at free-electrons.com>
----
- arch/arm/boot/dts/Makefile | 1 +
- arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts | 73 +++++++++++++++++++++++++
- 2 files changed, 74 insertions(+)
- create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts
-
---- a/arch/arm/boot/dts/Makefile
-+++ b/arch/arm/boot/dts/Makefile
-@@ -916,6 +916,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
- sun8i-a83t-allwinner-h8homlet-v2.dtb \
- sun8i-a83t-bananapi-m3.dtb \
- sun8i-a83t-cubietruck-plus.dtb \
-+ sun8i-h2-plus-orangepi-r1.dtb \
- sun8i-h2-plus-orangepi-zero.dtb \
- sun8i-h3-bananapi-m2-plus.dtb \
- sun8i-h3-beelink-x2.dtb \
---- /dev/null
-+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts
-@@ -0,0 +1,73 @@
-+/*
-+ * Copyright (C) 2017 Icenowy Zheng <icenowy at aosc.xyz>
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This file is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/* Orange Pi R1 is based on Orange Pi Zero design */
-+#include "sun8i-h2-plus-orangepi-zero.dts"
-+
-+/ {
-+ model = "Xunlong Orange Pi R1";
-+ compatible = "xunlong,orangepi-r1", "allwinner,sun8i-h2-plus";
-+
-+ /delete-node/ reg_vcc_wifi;
-+
-+ aliases {
-+ ethernet1 = &rtl8189etv;
-+ };
-+};
-+
-+&ohci1 {
-+ /*
-+ * RTL8152B USB-Ethernet adapter is connected to USB1,
-+ * and it's a USB 2.0 device. So the OHCI1 controller
-+ * can be left disabled.
-+ */
-+ status = "disabled";
-+};
-+
-+&mmc1 {
-+ vmmc-supply = <®_vcc3v3>;
-+ vqmmc-supply = <®_vcc3v3>;
-+
-+ rtl8189etv: sdio_wifi at 1 {
-+ reg = <1>;
-+ };
-+};
diff --git a/target/linux/sunxi/patches-4.19/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch b/target/linux/sunxi/patches-4.19/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch
deleted file mode 100644
index 9c0e64a902..0000000000
--- a/target/linux/sunxi/patches-4.19/061-arm-dts-sun50i-support-for-nanopi-neo-plus2-board.patch
+++ /dev/null
@@ -1,242 +0,0 @@
-From 54cc3330c2334a0cea8cafc105a29c5d67f9fd32 Mon Sep 17 00:00:00 2001
-From: Antony Antony <antony at phenome.org>
-Date: Fri, 2 Mar 2018 10:50:48 +0100
-Subject: [PATCH] arm64: allwinner: h5: add NanoPi NEO Plus2 DT support
-
-Add initial DT for NanoPi NEO Plus2 by FriendlyARM
-- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
-- 1 GB DDR3 RAM
-- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
-- micro SD card slot
-- Gigabit Ethernet (external RTL8211E-VB-CG chip)
-- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
-- 2x USB 2.0 host ports & 2x USB via headers
-
-Kernel 4.15 commit d7341305863b
-Kernel 4.16 commit 27d7f9297027
-
-Signed-off-by: Antony Antony <antony at phenome.org>
-
---- a/arch/arm64/boot/dts/allwinner/Makefile
-+++ b/arch/arm64/boot/dts/allwinner/Makefile
-@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-or
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
-+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
-
- always := $(dtb-y)
- subdir-y := $(dts-dirs)
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
-@@ -0,0 +1,210 @@
-+/*
-+ * Copyright (C) 2017 Antony Antony <antony at phenome.org>
-+ * Copyright (C) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This file is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This file is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+#include "sun50i-h5.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/pinctrl/sun4i-a10.h>
-+
-+/ {
-+ model = "FriendlyARM NanoPi NEO Plus2";
-+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
-+
-+ aliases {
-+ ethernet0 = &emac;
-+ serial0 = &uart0;
-+ };
-+
-+ chosen {
-+ stdout-path = "serial0:115200n8";
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ pwr {
-+ label = "nanopi:green:pwr";
-+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
-+ default-state = "on";
-+ };
-+
-+ status {
-+ label = "nanopi:red:status";
-+ gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
-+ };
-+ };
-+
-+ reg_gmac_3v3: gmac-3v3 {
-+ compatible = "regulator-fixed";
-+ pinctrl-names = "default";
-+ regulator-name = "gmac-3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ startup-delay-us = <100000>;
-+ enable-active-high;
-+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
-+ };
-+
-+ reg_vcc3v3: vcc3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "vcc3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ vdd_cpux: gpio-regulator {
-+ compatible = "regulator-gpio";
-+ pinctrl-names = "default";
-+ regulator-name = "vdd-cpux";
-+ regulator-type = "voltage";
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-min-microvolt = <1100000>;
-+ regulator-max-microvolt = <1300000>;
-+ regulator-ramp-delay = <50>; /* 4ms */
-+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
-+ gpios-states = <0x1>;
-+ states = <1100000 0x0
-+ 1300000 0x1>;
-+ };
-+
-+ wifi_pwrseq: wifi_pwrseq {
-+ compatible = "mmc-pwrseq-simple";
-+ pinctrl-names = "default";
-+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-+ post-power-on-delay-ms = <200>;
-+ };
-+};
-+
-+&codec {
-+ allwinner,audio-routing =
-+ "Line Out", "LINEOUT",
-+ "MIC1", "Mic",
-+ "Mic", "MBIAS";
-+ status = "okay";
-+};
-+
-+&ehci0 {
-+ status = "okay";
-+};
-+
-+&ehci3 {
-+ status = "okay";
-+};
-+
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 7 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <7>;
-+ };
-+};
-+
-+&mmc0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
-+ vmmc-supply = <®_vcc3v3>;
-+ bus-width = <4>;
-+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-+ status = "okay";
-+};
-+
-+&mmc1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc1_pins_a>;
-+ vmmc-supply = <®_vcc3v3>;
-+ vqmmc-supply = <®_vcc3v3>;
-+ mmc-pwrseq = <&wifi_pwrseq>;
-+ bus-width = <4>;
-+ non-removable;
-+ status = "okay";
-+
-+ brcmf: wifi at 1 {
-+ reg = <1>;
-+ compatible = "brcm,bcm4329-fmac";
-+ };
-+};
-+
-+&mmc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc2_8bit_pins>;
-+ vmmc-supply = <®_vcc3v3>;
-+ bus-width = <8>;
-+ non-removable;
-+ cap-mmc-hw-reset;
-+ status = "okay";
-+};
-+
-+&ohci0 {
-+ status = "okay";
-+};
-+
-+&ohci3 {
-+ status = "okay";
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins_a>;
-+ status = "okay";
-+};
-+
-+&usb_otg {
-+ dr_mode = "host";
-+ status = "okay";
-+};
-+
-+&usbphy {
-+ /* USB Type-A ports' VBUS is always on */
-+ status = "okay";
-+};
diff --git a/target/linux/sunxi/patches-4.19/201-ARM-dts-sun8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch b/target/linux/sunxi/patches-4.19/201-ARM-dts-sun8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch
deleted file mode 100644
index 905a705314..0000000000
--- a/target/linux/sunxi/patches-4.19/201-ARM-dts-sun8i-fix-USB-Ethernet-of-Orange-Pi-R1.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From b76dc5927f6442df913f03ed261c5bff18a98df6 Mon Sep 17 00:00:00 2001
-From: Icenowy Zheng <icenowy at aosc.io>
-Date: Thu, 28 Dec 2017 21:01:56 +0800
-Subject: [PATCH] ARM: dts: sun8i: fix USB Ethernet of Orange Pi R1
-
-Orange Pi R1 uses a Realtek RTL8152B USB Ethernet chip, which is easily
-seen on the board but not show in the schematics. A regulator for the
-power of the RTL8152B chip is hidden, which uses the same pin with the
-Wi-Fi regulator on the original Orange Pi Zero.
-
-Add this regulator back to the device tree, and bind it to USB1.
-
-Signed-off-by: Icenowy Zheng <icenowy at aosc.io>
----
- arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts | 18 ++++++++++++++++++
- 1 file changed, 18 insertions(+)
-
---- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts
-+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts
-@@ -49,6 +49,20 @@
-
- /delete-node/ reg_vcc_wifi;
-
-+ /*
-+ * Ths pin of this regulator is the same with the Wi-Fi extra
-+ * regulator on the original Zero. However it's used for USB
-+ * Ethernet rather than the Wi-Fi now.
-+ */
-+ reg_vcc_usb_eth: reg-vcc-usb-ethernet {
-+ compatible = "regulator-fixed";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ regulator-name = "vcc-usb-ethernet";
-+ enable-active-high;
-+ gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
-+ };
-+
- aliases {
- ethernet1 = &rtl8189etv;
- };
-@@ -71,3 +85,7 @@
- reg = <1>;
- };
- };
-+
-+&usbphy {
-+ usb1_vbus-supply = <®_vcc_usb_eth>;
-+};
diff --git a/target/linux/sunxi/patches-4.19/202-ARM-dts-sun8i-activate-SPI-on-Orange-Pi-R1.patch b/target/linux/sunxi/patches-4.19/202-ARM-dts-sun8i-activate-SPI-on-Orange-Pi-R1.patch
deleted file mode 100644
index 3f03c1163c..0000000000
--- a/target/linux/sunxi/patches-4.19/202-ARM-dts-sun8i-activate-SPI-on-Orange-Pi-R1.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 4a36ec1f82db3fa34d766dec5062b4de06b50f7f Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke at hauke-m.de>
-Date: Thu, 28 Dec 2017 14:11:36 +0100
-Subject: [PATCH] ARM: dts: sun8i: activate SPI on Orange Pi R1
-
-This board has a SPI flash, activate it also in device tree by default.
-
-Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
----
- arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts
-+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-r1.dts
-@@ -68,6 +68,14 @@
- };
- };
-
-+&spi0 {
-+ status = "okay";
-+
-+ flash at 0 {
-+ compatible = "mxicy,mx25l12805d", "jedec,spi-nor";
-+ };
-+};
-+
- &ohci1 {
- /*
- * RTL8152B USB-Ethernet adapter is connected to USB1,
diff --git a/target/linux/sunxi/patches-4.19/220-ARM-dts-orange-pi-zero-plus.patch b/target/linux/sunxi/patches-4.19/220-ARM-dts-orange-pi-zero-plus.patch
deleted file mode 100644
index 2eedb915dd..0000000000
--- a/target/linux/sunxi/patches-4.19/220-ARM-dts-orange-pi-zero-plus.patch
+++ /dev/null
@@ -1,185 +0,0 @@
-From 0e2da1a792a21e3933e17727920ed3c35a3ba57a Mon Sep 17 00:00:00 2001
-From: Hauke Mehrtens <hauke at hauke-m.de>
-Date: Sun, 11 Mar 2018 15:13:30 +0100
-Subject: [PATCH] arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus
-
-The Xunlong Orange Pi Zero Plus is single board computer.
-- H5 Quad-core 64-bit Cortex-A53
-- 512MB DDR3
-- microSD slot
-- Debug TTL UART
-- 1000M/100M/10M Ethernet RJ45
-- Realtek RTL8189FTV
-- Spi flash (2MB)
-- One USB 2.0 HOST, One USB 2.0 OTG
-
-This is based on a patch from armbian:
-https://github.com/armbian/build/blob/master/patch/kernel/sunxi-next/sunxi-add-orangepi-zero-plus.patch
-
-Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
----
- arch/arm64/boot/dts/allwinner/Makefile | 1 +
- .../dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 147 +++++++++++++++++++++
- 2 files changed, 148 insertions(+)
- create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
-
---- a/arch/arm64/boot/dts/allwinner/Makefile
-+++ b/arch/arm64/boot/dts/allwinner/Makefile
-@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-p
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
-+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
- dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
---- /dev/null
-+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
-@@ -0,0 +1,147 @@
-+/*
-+ * Copyright (C) 2016 ARM Ltd.
-+ * Copyright (C) 2018 Hauke Mehrtens <hauke at hauke-m.de>
-+ *
-+ * SPDX-License-Identifier: (GPL-2.0+ OR X11)
-+ */
-+
-+/dts-v1/;
-+#include "sun50i-h5.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
-+#include <dt-bindings/pinctrl/sun4i-a10.h>
-+
-+/ {
-+ model = "Xunlong Orange Pi Zero Plus";
-+ compatible = "xunlong,orangepi-zero-plus", "allwinner,sun50i-h5";
-+
-+ reg_vcc3v3: vcc3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "vcc3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ aliases {
-+ ethernet0 = &emac;
-+ ethernet1 = &rtl8189ftv;
-+ serial0 = &uart0;
-+ };
-+
-+ chosen {
-+ stdout-path = "serial0:115200n8";
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ pwr {
-+ label = "orangepi:green:pwr";
-+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
-+ default-state = "on";
-+ };
-+
-+ status {
-+ label = "orangepi:red:status";
-+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
-+ };
-+ };
-+
-+ reg_gmac_3v3: gmac-3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "gmac-3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ startup-delay-us = <100000>;
-+ enable-active-high;
-+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
-+ };
-+};
-+
-+&ehci0 {
-+ status = "okay";
-+};
-+
-+&ehci1 {
-+ status = "okay";
-+};
-+
-+&emac {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&emac_rgmii_pins>;
-+ phy-supply = <®_gmac_3v3>;
-+ phy-handle = <&ext_rgmii_phy>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&external_mdio {
-+ ext_rgmii_phy: ethernet-phy at 1 {
-+ compatible = "ethernet-phy-ieee802.3-c22";
-+ reg = <1>;
-+ };
-+};
-+
-+&mmc0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc0_pins_a>;
-+ vmmc-supply = <®_vcc3v3>;
-+ bus-width = <4>;
-+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-+ status = "okay";
-+};
-+
-+&mmc1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc1_pins_a>;
-+ vmmc-supply = <®_vcc3v3>;
-+ bus-width = <4>;
-+ non-removable;
-+ status = "okay";
-+
-+ /*
-+ * Explicitly define the sdio device, so that we can add an ethernet
-+ * alias for it (which e.g. makes u-boot set a mac-address).
-+ */
-+ rtl8189ftv: sdio_wifi at 1 {
-+ reg = <1>;
-+ };
-+};
-+
-+&spi0 {
-+ status = "okay";
-+
-+ flash at 0 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "mxicy,mx25l1606e", "winbond,w25q128";
-+ reg = <0>;
-+ spi-max-frequency = <40000000>;
-+ };
-+};
-+
-+&ohci0 {
-+ status = "okay";
-+};
-+
-+&ohci1 {
-+ status = "okay";
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins_a>;
-+ status = "okay";
-+};
-+
-+&usb_otg {
-+ dr_mode = "peripheral";
-+ status = "okay";
-+};
-+
-+&usbphy {
-+ /* USB Type-A ports' VBUS is always on */
-+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
-+ status = "okay";
-+};
diff --git a/target/linux/sunxi/patches-4.19/301-orangepi_pc2_usb_otg_to_host_key_power.patch b/target/linux/sunxi/patches-4.19/301-orangepi_pc2_usb_otg_to_host_key_power.patch
index d8693374d2..af243ca3e7 100644
--- a/target/linux/sunxi/patches-4.19/301-orangepi_pc2_usb_otg_to_host_key_power.patch
+++ b/target/linux/sunxi/patches-4.19/301-orangepi_pc2_usb_otg_to_host_key_power.patch
@@ -1,6 +1,6 @@
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
-@@ -87,7 +87,7 @@
+@@ -98,7 +98,7 @@
sw4 {
label = "sw4";
@@ -9,7 +9,7 @@
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
};
};
-@@ -203,7 +203,7 @@
+@@ -238,7 +238,7 @@
};
&usb_otg {
diff --git a/target/linux/sunxi/patches-4.19/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch b/target/linux/sunxi/patches-4.19/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch
index 3f8a3418a9..1d58b7bcba 100644
--- a/target/linux/sunxi/patches-4.19/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch
+++ b/target/linux/sunxi/patches-4.19/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch
@@ -15,7 +15,7 @@ This reverts commit d7b9eaff5f0ca00726336b4c0c3c29decf30412a.
--- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
+++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
-@@ -109,67 +109,13 @@
+@@ -124,67 +124,13 @@
&gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_pins_rgmii_a>;
--
2.19.2
_______________________________________________
openwrt-devel mailing list
openwrt-devel at lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel
More information about the openwrt-devel
mailing list