[OpenWrt-Devel] [PATCH v2 2/2] lantiq: use the same functionality for all ethernet phys led

[Mathias Kresin]

The VGV7510KW22 has the leds for LAN1-3 connected to pin1 of the phys
and the led for LAN4 connect to pin0 of the phy. This results with the
current configuration in a fast flashing LAN4 led as soon as a network
cable is connected. Something similar was reported on the forum[1] for
the VGV7519 as well.

Since it isn't predicable to which pin a (single) phy led is connected,
use the (default) pin1 functionality

    Constant On: 10/100/1000MBit
    Blink Fast: None
    Blink Slow: None
    Pulse: TX/RX

for all ethernet phy leds.

After checking pictures of all vr9 boards, it looks like only the VG3503J
has more than one led connected per phy. Using the phy led device tree
bindings to assign the functionality to the "additional" leds, the
VG3503J phy leds should behave as before.

Signed-off-by: Mathias Kresin <openwrt at kresin.me>

[1] https://forum.openwrt.org/viewtopic.php?pid=321523
---

Changes in v2:
  - fix syntax error in VG3503J.dtsi

I know there is a fourth led functionality register (led3h/led3l), but to
my knowledge only three pins to connect leds to. Can someone (with access
to the datasheets) enlighten me what's the register is used for?
---
 target/linux/lantiq/dts/VG3503J.dtsi                         |  8 ++++++++
 .../0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch         | 12 ++++++------
 2 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/target/linux/lantiq/dts/VG3503J.dtsi b/target/linux/lantiq/dts/VG3503J.dtsi
index a45e90b..780d838 100644
--- a/target/linux/lantiq/dts/VG3503J.dtsi
+++ b/target/linux/lantiq/dts/VG3503J.dtsi
@@ -153,10 +153,18 @@
 		phy11: ethernet-phy at 11 {
 			reg = <0x11>;
 			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+			lantiq,led0h = <0x42>;
+			lantiq,led0l = <0x10>;
+			lantiq,led2h = <0x20>;
+			lantiq,led2l = <0x00>;
 		};
 		phy13: ethernet-phy at 13 {
 			reg = <0x13>;
 			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+			lantiq,led0h = <0x42>;
+			lantiq,led0l = <0x10>;
+			lantiq,led2h = <0x20>;
+			lantiq,led2l = <0x00>;
 		};
 	};
 };
diff --git a/target/linux/lantiq/patches-4.4/0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch b/target/linux/lantiq/patches-4.4/0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch
index 738a248..93bb427 100644
--- a/target/linux/lantiq/patches-4.4/0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch
+++ b/target/linux/lantiq/patches-4.4/0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch
@@ -165,14 +165,14 @@ Signed-off-by: John Crispin <blogic at openwrt.org>
 +
 +	vr9_gphy_mmd_write(phydev, 0x1e0, 0xc5);
 +	vr9_gphy_mmd_write(phydev, 0x1e1, 0x67);
-+	vr9_gphy_mmd_write(phydev, 0x1e2, 0x42);
-+	vr9_gphy_mmd_write(phydev, 0x1e3, 0x10);
++	vr9_gphy_mmd_write(phydev, 0x1e2, 0x70);
++	vr9_gphy_mmd_write(phydev, 0x1e3, 0x03);
 +	vr9_gphy_mmd_write(phydev, 0x1e4, 0x70);
 +	vr9_gphy_mmd_write(phydev, 0x1e5, 0x03);
-+	vr9_gphy_mmd_write(phydev, 0x1e6, 0x20);
-+	vr9_gphy_mmd_write(phydev, 0x1e7, 0x00);
-+	vr9_gphy_mmd_write(phydev, 0x1e8, 0x40);
-+	vr9_gphy_mmd_write(phydev, 0x1e9, 0x20);
++	vr9_gphy_mmd_write(phydev, 0x1e6, 0x70);
++	vr9_gphy_mmd_write(phydev, 0x1e7, 0x03);
++	vr9_gphy_mmd_write(phydev, 0x1e8, 0x70);
++	vr9_gphy_mmd_write(phydev, 0x1e9, 0x03);
 +
 +	vr9_gphy_of_reg_init(phydev);
 +
-- 
1.9.1
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