[OpenWrt-Devel] [RFC] ag71xx: Enable flow control for builtin switch port

[Sven Eckelmann]

From: Sven Eckelmann <sven.eckelmann at open-mesh.com>

The port connected to the internal switch tends to drop a lot of packets
when a lot of data is transferred over it. This is especially visible when
IP fragmentation happens for large UDP and ICMP packets. An easy test for
this is

    # works
    ping 192.168.1.23
    # doesn't work
    ping -s 65507 192.168.1.23

But enabling flow control on ports without the builtin switch seems to
break the connection completely in some situations. This was for example
detected when a QCA955x with AR98533 on GMAC1 was started with an active
link on this port. So only enable it for SoC ethernet devices with
switch attached.

This closes #19498

Signed-off-by: Sven Eckelmann <sven.eckelmann at open-mesh.com>
---
This is only an RFC because Felix reverted a similar change in r27034.
Unfortunately, the revert commit doesn't contain enough information to
find out if this problem would also happen when only activating flow
control on the switch port port or when only enabling TX and not RX
flow control (or the other way around).

 .../ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c  | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index 0832059..208b1d6 100644
--- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -455,7 +455,11 @@ static void ag71xx_hw_setup(struct ag71xx *ag)
 	struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
 
 	/* setup MAC configuration registers */
-	ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
+	if (pdata->is_ar724x && pdata->switch_data)
+		ag71xx_wr(ag, AG71XX_REG_MAC_CFG1,
+			  MAC_CFG1_INIT | MAC_CFG1_TFC | MAC_CFG1_RFC);
+	else
+		ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
 
 	ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
 		  MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
-- 
2.8.0.rc3
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