[OpenWrt-Devel] MT7621 board (512MB) high memory relevant issue.
Tymon
banglang.huang at foxmail.com
Mon Aug 10 23:09:21 EDT 2015
My testbed's memory is 512MB, but the memory showed to us is 448MB( init as BOOT_MEM_RAM) and the high memory is 0 K, why ?
And I found that if both the 448MB and other 64MB init as BOOT_MEM_RAM, the samba(pbsam-util accelerate) service will work with a low speed transmission(20MB/s) while it is 70MB/s when 448MB init as BOOT_MEM_RAM and the other 64MB init as BOOT_MEM_INIT_RAM.
below is the bootlog:
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 512
Starting kernel ...
xxxBoxx For Ralink/MTK APSoC. Copyright 2013-2014 xxx Technology CHN
LINUX started...
THIS IS ASIC
[ 0.000000] Linux version 3.14.49 (xxxx at xxxx) (gcc version 4.8.3 (xxxxx/Linaro GCC 4.8-2014.04 xxxx) ) #11 SMP Tue Aug 11 09:56:58 CST 2015
[ 0.000000] MT7621: MPLL enabled.
[ 0.000000] xxxxBox CPUID Module for Ralink/MTK SoC v1.1.
[ 0.000000] MediaTek MT7621 pkg:BGA rev:1 eco:3 CPU:880MHz, Bus:293MHz Uart:50MHz
[ 0.000000] CPU running in Little Endian
[ 0.000000] Board VLAN:LLLLW
[ 0.000000] Flash:SPI Size: 32MB
[ 0.000000] DRAM: 512MB DDR3 16 bits
[ 0.000000] Kernel Support [PCI] [USB]
[ 0.000000] prom memory:512MB
[ 0.000000] MT7621:Reserved highmem for 512MB DRAM 24000000
[ 0.000000] GCMP present
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] Software DMA cache coherency
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 1c000000 @ 00000000 (usable)
[ 0.000000] memory: 04000000 @ 20000000 (usable after init)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x00000000-0x1bffffff]
[ 0.000000] HighMem empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x00000000-0x1bffffff]
[ 0.000000] node 0: [mem 0x20000000-0x23ffffff]
[ 0.000000] Detected 3 available secondary CPU(s)
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] PERCPU: Embedded 7 pages/cpu @81384000 s5696 r8192 d14784 u32768
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 113792
[ 0.000000] Kernel command line: pause_on_oops=10 noresume board=PBR-M1 console=ttyS1,115200 rootfstype=squashfs,jffs2
[ 0.000000] PID hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Writing ErrCtl register=00030004
[ 0.000000] Readback ErrCtl register=00030004
[ 0.000000] Memory: 450772K/458752K available (2673K kernel code, 141K rwdata, 508K rodata, 184K init, 289K bss, 7980K reserved, 0K highmem)
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:256
------------------
Regards,
banglang huang
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