[OpenWrt-Devel] [PATCH 3/4] ipq806x: fix pcie pinmux naming in ipq806x dts
Felix Fietkau
nbd at openwrt.org
Tue Aug 4 19:04:33 EDT 2015
On 2015-08-04 23:55, Mathieu Olivari wrote:
> PCIe controller nodes are numbers 0/1/2 in the chipset dtsi file, but
> the pinmux nodes are numbers 1/2/3. We'll make it consistent by changing
> the pinmux numbering to match the controller's one.
>
> Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
> ---
> diff --git a/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
> index cce30b0..8d6e77a 100644
> --- a/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
> +++ b/target/linux/ipq806x/patches-3.18/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
> @@ -12,7 +12,7 @@ Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
>
> --- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
> +++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
> -@@ -64,6 +64,16 @@
> +@@ -69,6 +69,16 @@
> bias-disable;
> };
> };
> @@ -29,7 +29,7 @@ Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
> };
>
> gsbi at 16300000 {
> -@@ -201,5 +211,26 @@
> +@@ -206,5 +216,26 @@
> reg = <4>;
> };
> };
> @@ -116,9 +116,9 @@ Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
> };
> --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
> +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
> -@@ -638,5 +638,91 @@
> - dr_mode = "host";
> - };
> +@@ -87,6 +87,92 @@
> + clock-frequency = <32768>;
> + #clock-cells = <0>;
> };
> +
> + nss_common: syscon at 03000000 {
> @@ -207,4 +207,5 @@ Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
> + status = "disabled";
> + };
> };
> - };
> +
> + kraitcc: clock-controller {
FYI, this part completely messed up the patch, as it moved the gmac
device tree nodes from /soc to /clocks. I've fixed it up locally and I
will commit the fixed version.
- Felix
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