[PATCH v2] realtek: do not reset SerDes on link change

Birger Koblitz mail at birger-koblitz.de
Wed Apr 27 11:16:11 PDT 2022


Hi,

there are presently no working 1GBit SFP modules in master for RTL9300
(this patch only affects RTL93xx SoCs). On the Ubiquiti USW switch
only the 10GBit modules are set up by u-boot and they continue to work.
The setup really only does a setup of the link not the entire serdes. The initial reset
was done on initialization of the internal PHY associated with the SerDes
via rtl9300_configure_serdes() calling rtl9300_sds_rst() during the PHY
probe. So calling rtl9300_sds_rst() for every link change was anyway too much.

Complete control over SFP+ ports to allow 10G, 1G, Copper modules, and
DAC cables will only be available with the latest developments which were
posted in the forum recently and should lead to a PR soon. For this to work
the SerDes-MAC link needs to be switched and then this link re-calibrated
which I only figured out recently.

Cheers,
  Birger

On 27.04.22 18:06, Sander Vanheule wrote:
> Hi Birger,
> 
> On Sun, 2022-04-24 at 22:01 +0200, Birger Koblitz wrote:
>> Do not reset the RTL930x SerDes on link changes, instead set up
>> the SDS with internal PHYs for the SFP+ ports only.
>> This fixes the 8 1GBit ports on the Zyxel XGS1250 which
>> do not work without this patch.
>>
>> Tested-by: Stijn Segers <foss at volatilesystems.org>
>> Signed-off-by: Birger Koblitz <git at birger-koblitz.de>
>> ---
>> v2: A different patch was previously sent with this subject.
>>     This is the correct patch.
>>  target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c  | 3 ++-
>>  .../linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl83xx.h | 1 +
>>  2 files changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
>> b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
>> index 858b692640..5f19a1f590 100644
>> --- a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
>> +++ b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c
>> @@ -814,7 +814,8 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int
>> port,
>>                                __func__, phy_modes(state->interface));
>>                         return;
>>                 }
>> -               rtl9300_sds_rst(sds_num, sds_mode);
>> +               if (state->interface == PHY_INTERFACE_MODE_10GBASER)
>> +                       rtl9300_serdes_setup(sds_num, state->interface);
> 
> 
> Resetting the SerDes(-es?) makes it end up in a state where the 1Gb (copper) ports don't
> work. So with fixed phy-s, I can see how skipping a reset could help.
> 
> Instead of a _reset_, you now only do a mode change on 10GBASER ports, using a _setup_
> call. The reset and setup also are not entirely equivalent, so why change to
> rtl9300_serdes_setup()? Do 1G SFP modules still work if you only change modes for
> 10GBASER?
> 
> Best,
> Sander
> 



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