[OpenWrt-Devel] [PATCH] ramips: kernel: fix awake-rt305x-dwc2 patch

[Alexey Dobrovolsky]

At this point in v5.4 kernel we cannot use dwc2_readl() and
dwc2_writel() since they rely on the value hsotg->needs_byte_swap
which cannot be obtained before the controller wakes up.
We should use readl() and writel() to wake up the controller before
calling dwc2_check_core_endianness().

Fixes:
- 0069-awake-rt305x-dwc2-controller.patch

Signed-off-by: Alexey Dobrovolsky <dobrovolskiy.alexey at gmail.com>
---
 .../0069-awake-rt305x-dwc2-controller.patch        | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/target/linux/ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch b/target/linux/ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch
index 1ce8fac682..1ce7102a4e 100644
--- a/target/linux/ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch
+++ b/target/linux/ramips/patches-5.4/0069-awake-rt305x-dwc2-controller.patch
@@ -1,15 +1,15 @@
 --- a/drivers/usb/dwc2/platform.c
 +++ b/drivers/usb/dwc2/platform.c
-@@ -432,6 +432,12 @@ static int dwc2_driver_probe(struct plat
- 
- 	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
+@@ -430,6 +430,12 @@ static int dwc2_driver_probe(struct plat
+	if (retval)
+		return retval;
  
 +	/* Enable USB port before any regs access */
-+	if (dwc2_readl(hsotg, PCGCTL) & 0x0f) {
-+		dwc2_writel(0x00, hsotg, PCGCTL);
++	if (readl(hsotg->regs + PCGCTL) & 0x0f) {
++		writel(0x00, hsotg->regs + PCGCTL);
 +		/* TODO: mdelay(25) here? vendor driver don't use it */
 +	}
 +
+ 	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
+
  	retval = dwc2_get_dr_mode(hsotg);
- 	if (retval)
- 		goto error;
-- 
2.17.1


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