[OpenWrt-Devel] ramips/mt7621 after 5.4 switch

Sergio Paracuellos sergio.paracuellos at gmail.com
Fri Apr 10 07:38:55 EDT 2020


On Fri, Apr 10, 2020 at 1:36 PM Sergio Paracuellos
<sergio.paracuellos at gmail.com> wrote:
>
> Hi André,
>
> On Fri, Apr 10, 2020 at 11:36 AM Andre Valentin <avalentin at marcant.net> wrote:
> >
> > Hi Sergio,
> >
> > the device has an onboard LTE modem. Tonight I noticed that the originial pci driver
> > must have changed some additional GPIO pins.
> > After more testing, I found the GPIO and the LTE device now operates again.
>
> Good!
>
> >
> > But after more testing, I found out that the wifi chip does not fully initialize.
> > new PCI driver:
> > [    0.641632] PCI: CLS 0 bytes, default 32
> > [    1.242280] rt2880-pinmux pinctrl: found group selector 6 for pcie
> > [    1.242302] rt2880-pinmux pinctrl: request pin 19 (io19) for 1e140000.pcie
> > [    1.242447] mt7621-pci 1e140000.pcie: Parsing DT failed
> > [    2.898143] rt2880-pinmux pinctrl: found group selector 6 for pcie
> > [    2.898166] rt2880-pinmux pinctrl: request pin 19 (io19) for 1e140000.pcie
> > [    2.898180] rt2880-pinmux pinctrl: pcie is already enabled
> > [    2.909148] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
> > [    2.924231] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1)
> > [    2.938973] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset
> > [    2.938982] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup
> > [    2.939032] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node '/pcie at 1e140000[0]' - status (0)
> > [    2.939094] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset
> > [    2.939102] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup
> > [    2.939120] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of node '/pcie at 1e140000[1]'
> > [    2.939136] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of node '/pcie at 1e140000[1]'
> > [    2.939147] mt7621-pci 1e140000.pcie: using lookup tables for GPIO lookup
> > [    2.939157] mt7621-pci 1e140000.pcie: No GPIO consumer reset found
> > [    2.939211] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
> > [    2.953954] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset
> > [    2.953962] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup
> > [    2.953985] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of node '/pcie at 1e140000[2]'
> > [    2.954000] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of node '/pcie at 1e140000[2]'
> > [    2.954011] mt7621-pci 1e140000.pcie: using lookup tables for GPIO lookup
> > [    2.954019] mt7621-pci 1e140000.pcie: No GPIO consumer reset found
> > [    3.053867] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
> > [    3.064992] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
> > [    3.175896] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK)
> > [    3.189768] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
> > [    3.203643] mt7621-pci 1e140000.pcie: PCIE1 enabled
> > [    3.213373] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
> > [    3.232132] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
> > [    3.244820] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
> > [    3.258527] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
> > [    3.272233] pci_bus 0000:00: root bus resource [bus 00-ff]
> > [    3.283209] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
> > [    3.295226] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
> > [    3.307723] pci 0000:00:00.0: reg 0x14: [mem 0x60200000-0x6020ffff]
> > [    3.320294] pci 0000:00:00.0: supports D1
> > [    3.328287] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
> > [    3.341226] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280
> > [    3.353293] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit]
> > [    3.366998] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5 GT/s x1 link)
> > [    3.395633] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> > [    3.406073] pci 0000:00:00.0:   bridge window [io  0x0000-0x0fff]
> > [    3.418220] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
> > [    3.431784] pci 0000:00:00.0:   bridge window [mem 0x60100000-0x601fffff pref]
> > [    3.446184] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
> > [    3.459414] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
> > [    3.472600] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
> > [    3.486479] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
> > [    3.500016] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
> > [    3.514411] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
> > [    3.527951] pci 0000:00:00.0: BAR 7: assigned [io  0x1e160000-0x1e160fff]
> > [    3.541489] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
> > [    3.556077] pci 0000:00:00.0: PCI bridge to [bus 01]
> > [    3.565975] pci 0000:00:00.0:   bridge window [io  0x1e160000-0x1e160fff]
> > [    3.579504] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
> > [    3.593037] pci 0000:00:00.0:   bridge window [mem 0x60100000-0x601fffff pref]
> > [   27.217458] pci 0000:00:00.0: enabling device (0006 -> 0007)
> > [   27.217158] mt7615e 0000:01:00.0: no of_node; not parsing pinctrl DT
> > [   27.228879] mt7615e 0000:01:00.0: enabling device (0000 -> 0002)
>
> This trace looks good and correct. Resources are being properly
> assigned and devices
> seems to be properly enabled.
>
> > [   48.339930] mt7615e 0000:01:00.0: Message -16 (seq 1) timeout
> > [   48.351648] mt7615e 0000:01:00.0: Failed to get patch semaphore
>
> This two are obviously wrong....
>
> >
> >
> > Old one:
> >
>
> [snip]
>
> >
> > cat /proc/interrupts new:
> >            CPU0       CPU1       CPU2       CPU3
> >   8:      75188      75268      75341      75246  MIPS GIC Local   1  timer
> >   9:      24413          0          0          0  MIPS GIC  63  IPI call
> >  10:          0       4442          0          0  MIPS GIC  64  IPI call
> >  11:          0          0      33324          0  MIPS GIC  65  IPI call
> >  12:          0          0          0       4574  MIPS GIC  66  IPI call
> >  13:       3424          0          0          0  MIPS GIC  67  IPI resched
> >  14:          0       4124          0          0  MIPS GIC  68  IPI resched
> >  15:          0          0       3974          0  MIPS GIC  69  IPI resched
> >  16:          0          0          0       4150  MIPS GIC  70  IPI resched
> >  17:          0          0          0          0  MIPS GIC  19  1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
> >  19:        829          0          0          0  MIPS GIC  33  ttyS0
> >  20:          0          0          0          0  MIPS GIC  29  xhci-hcd:usb1
> >  21:        817          0          0          0  MIPS GIC  10  1e100000.ethernet
> >  23:          0          0          0          0  MIPS GIC  11  mt7615e
> > ERR:          1
> >
> >
> > cat /proc/interrupts old:
> >
> >            CPU0       CPU1       CPU2       CPU3
> >   8:      25513      25556      25674      25681  MIPS GIC Local   1  timer
> >   9:      23603          0          0          0  MIPS GIC  63  IPI call
> >  10:          0       4383          0          0  MIPS GIC  64  IPI call
> >  11:          0          0      32117          0  MIPS GIC  65  IPI call
> >  12:          0          0          0       4189  MIPS GIC  66  IPI call
> >  13:       3428          0          0          0  MIPS GIC  67  IPI resched
> >  14:          0       4144          0          0  MIPS GIC  68  IPI resched
> >  15:          0          0       3812          0  MIPS GIC  69  IPI resched
> >  16:          0          0          0       3769  MIPS GIC  70  IPI resched
> >  17:          0          0          0          0  MIPS GIC  19  1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
> >  19:       1022          0          0          0  MIPS GIC  33  ttyS0
> >  20:          0          0          0          0  MIPS GIC  29  xhci-hcd:usb1
> >  21:        269          0          0          0  MIPS GIC  10  1e100000.ethernet
> >  24:       1131          0          0          0  MIPS GIC  31  mt7615e
> > ERR:          0
> > => Interesting, different interrupts.
>
> That's weird. Should be the same, AFAICT.
> Needs some investigation but looks like you are not getting interrupts
> at all according to these traces...
>
> Looking into my gnubee I got also 23, 24 and 25.
>
> # cat /proc/interrupts
>            CPU0       CPU1       CPU2       CPU3
>   7:          0          0          0          0      MIPS   7  timer
>   8:       3537       3346       3296       3351  MIPS GIC Local   1  timer
>   9:       3025          0          0          0  MIPS GIC  63  IPI call
>  10:          0       1209          0          0  MIPS GIC  64  IPI call
>  11:          0          0       2805          0  MIPS GIC  65  IPI call
>  12:          0          0          0       1200  MIPS GIC  66  IPI call
>  13:       1428          0          0          0  MIPS GIC  67  IPI resched
>  14:          0       4136          0          0  MIPS GIC  68  IPI resched
>  15:          0          0        872          0  MIPS GIC  69  IPI resched
>  16:          0          0          0        666  MIPS GIC  70  IPI resched
>  17:          0          0          0          0  MIPS GIC  19
> 1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
>  18:        138          0          0          0  MIPS GIC  33  ttyS0
>  19:          0          0          0          0  MIPS GIC  27  1e130000.sdhci
>  20:         26          0          0          0  MIPS GIC  29  xhci-hcd:usb1
>  21:          7          0          0          0  MIPS GIC  10
> 1e100000.ethernet
>  23:          0          0          0          0  MIPS GIC  11
> ahci[0000:01:00.0]
>  24:          0          0          0          0  MIPS GIC  31
> ahci[0000:02:00.0]
>  25:        279          0          0          0  MIPS GIC  32
> ahci[0000:03:00.0]
>  26:          0          0          0          0  1e000600.gpio  18  reset
> ERR:          0
>
>
> >
> > Diff DTS old to new driver:
> > diff --git b/target/linux/ramips/dts/mt7621.dtsi a/target/linux/ramips/dts/mt7621.dtsi
> > index 0bf1069b5c..63befa1fdc 100644
> > --- b/target/linux/ramips/dts/mt7621.dtsi
> > +++ a/target/linux/ramips/dts/mt7621.dtsi
> > @@ -557,9 +550,10 @@
> >
> >         pcie: pcie at 1e140000 {
> >                 compatible = "mediatek,mt7621-pci";
> > -               reg = <0x1e140000 0x100
> > -                       0x1e142000 0x100>;
> > -
> > +               reg = <0x1e140000 0x100     /* host-pci bridge registers */
> > +                       0x1e142000 0x100    /* pcie port 0 RC control registers */
> > +                       0x1e143000 0x100    /* pcie port 1 RC control registers */
> > +                       0x1e144000 0x100>;  /* pcie port 2 RC control registers */
> >                 #address-cells = <3>;
> >                 #size-cells = <2>;
> >
> > @@ -574,10 +568,11 @@
> >                         0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
> >                 >;
> >
> > -               interrupt-parent = <&gic>;
> > -               interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
> > -                               GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
> > -                               GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
> > +               #interrupt-cells = <1>;
> > +               interrupt-map-mask = <0xF0000 0 0 1>;
> > +               interrupt-map = <0x10000 0 0 1 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,
> > +                               <0x20000 0 0 1 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>,
> > +                               <0x30000 0 0 1 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
> >
> >                 status = "disabled";
>
> New driver uses common:
>
> host->map_irq = of_irq_parse_and_map_pci;
> host->swizzle_irq = pci_common_swizzle;
>
> instead of pcibios_map_irq stuff... Because you are only using slot 1
> maybe if slot 0 is not in use we have to map the irq in slot 0 into
> the slot 1...
>
> Does these changes makes the job for you? diff --git
> a/drivers/staging/mt7621-pci/pci-mt7621.c
> b/drivers/staging/mt7621-pci/pci-mt7621.c
> index b9d460a9c041..11c46f955745 100644
> --- a/drivers/staging/mt7621-pci/pci-mt7621.c
> +++ b/drivers/staging/mt7621-pci/pci-mt7621.c
> @@ -122,6 +122,7 @@ struct mt7621_pcie_port {
>   * @ports: pointer to PCIe port information
>   * @resets_inverted: depends on chip revision
>   * reset lines are inverted.
> + * @link_status: link status of pcie device.
>   */
>  struct mt7621_pcie {
>         void __iomem *base;
> @@ -136,6 +137,7 @@ struct mt7621_pcie {
>         unsigned long io_map_base;
>         struct list_head ports;
>         bool resets_inverted;
> +       u32 link_status;
>  };
>
>  static inline u32 pcie_read(struct mt7621_pcie *pcie, u32 reg)
> @@ -279,6 +281,24 @@ static void setup_cm_memory_region(struct
> mt7621_pcie *pcie)
>         }
>  }
>
> +static int mt7621_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
> +{
> +       struct mt7621_pcie *pcie = pdev->bus->sysdata;
> +       int irq_map[PCIE_P2P_MAX];
> +       int n, i;
> +
> +       /* Assign IRQs */
> +       n = 0;
> +       for (i = 0; i < PCIE_P2P_MAX; i++)
> +               if (pcie->link_status & BIT(i))
> +                       irq_map[n++] = of_irq_parse_and_map_pci(pdev,
> slot, pin);
> +
> +       for (i = n; i < PCIE_P2P_MAX; i++)
> +               irq_map[i] = -1;
> +
> +       return irq_map[slot];
> +}
> +
>  static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie)
>  {
>         struct device *dev = pcie->dev;
> @@ -583,29 +603,29 @@ static void mt7621_pcie_enable_ports(struct
> mt7621_pcie *pcie)
>
>  static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie)
>  {
> -       u32 pcie_link_status = 0;
>         u32 n;
>         int i;
>         u32 p2p_br_devnum[PCIE_P2P_MAX];
>         struct mt7621_pcie_port *port;
>
> +       pcie->link_status = 0;
>         list_for_each_entry(port, &pcie->ports, list) {
>                 u32 slot = port->slot;
>
>                 if (port->enabled)
> -                       pcie_link_status |= BIT(slot);
> +                       pcie->link_status |= BIT(slot);
>         }
>
> -       if (pcie_link_status == 0)
> +       if (pcie->link_status == 0)
>                 return -1;
>
>         n = 0;
>
>

Sorry, gets wrong copy. Attach patch instead.

>
> >
> > @@ -585,32 +580,45 @@
> >                 reset-names = "pcie0", "pcie1", "pcie2";
> >                 clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
> >                 clock-names = "pcie0", "pcie1", "pcie2";
> > +               phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
> > +               phy-names = "pcie-phy0", "pcie-phy2";
> > +
> > +               reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
> >
> >                 pcie0: pcie at 0,0 {
> >                         reg = <0x0000 0 0 0 0>;
> > -
> >                         #address-cells = <3>;
> >                         #size-cells = <2>;
> > -
> >                         ranges;
> > +                       bus-range = <0x00 0xff>;
> >                 };
> >
> >                 pcie1: pcie at 1,0 {
> >                         reg = <0x0800 0 0 0 0>;
> > -
> >                         #address-cells = <3>;
> >                         #size-cells = <2>;
> > -
> >                         ranges;
> > +                       bus-range = <0x00 0xff>;
> >                 };
> >
> >                 pcie2: pcie at 2,0 {
> >                         reg = <0x1000 0 0 0 0>;
> > -
> >                         #address-cells = <3>;
> >                         #size-cells = <2>;
> > -
> >                         ranges;
> > +                       bus-range = <0x00 0xff>;
> >                 };
> >         };
> > +
> > +       pcie0_phy: pcie-phy at 1e149000 {
> > +               compatible = "mediatek,mt7621-pci-phy";
> > +               reg = <0x1e149000 0x0700>;
> > +               #phy-cells = <1>;
> > +       };
> > +
> > +       pcie2_phy: pcie-phy at 1e14a000 {
> > +               compatible = "mediatek,mt7621-pci-phy";
> > +               reg = <0x1e14a000 0x0700>;
> > +               #phy-cells = <1>;
> > +       };
> >  };
> >
> > Why are the interupts mapped a different way? I do not understand that.
> >
> > Kind regards,
> >
> > André
>
> Best regards,
>     Sergio Paracuellos
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