[OpenWrt-Devel] ramips/mt7621 after 5.4 switch
Andre Valentin
avalentin at marcant.net
Fri Apr 10 05:36:24 EDT 2020
Hi Sergio,
the device has an onboard LTE modem. Tonight I noticed that the originial pci driver
must have changed some additional GPIO pins.
After more testing, I found the GPIO and the LTE device now operates again.
But after more testing, I found out that the wifi chip does not fully initialize.
new PCI driver:
[ 0.641632] PCI: CLS 0 bytes, default 32
[ 1.242280] rt2880-pinmux pinctrl: found group selector 6 for pcie
[ 1.242302] rt2880-pinmux pinctrl: request pin 19 (io19) for 1e140000.pcie
[ 1.242447] mt7621-pci 1e140000.pcie: Parsing DT failed
[ 2.898143] rt2880-pinmux pinctrl: found group selector 6 for pcie
[ 2.898166] rt2880-pinmux pinctrl: request pin 19 (io19) for 1e140000.pcie
[ 2.898180] rt2880-pinmux pinctrl: pcie is already enabled
[ 2.909148] mt7621-pci 1e140000.pcie: Error applying setting, reverse things back
[ 2.924231] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1)
[ 2.938973] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset
[ 2.938982] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup
[ 2.939032] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node '/pcie at 1e140000[0]' - status (0)
[ 2.939094] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset
[ 2.939102] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup
[ 2.939120] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of node '/pcie at 1e140000[1]'
[ 2.939136] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of node '/pcie at 1e140000[1]'
[ 2.939147] mt7621-pci 1e140000.pcie: using lookup tables for GPIO lookup
[ 2.939157] mt7621-pci 1e140000.pcie: No GPIO consumer reset found
[ 2.939211] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
[ 2.953954] mt7621-pci 1e140000.pcie: GPIO lookup for consumer reset
[ 2.953962] mt7621-pci 1e140000.pcie: using device tree for GPIO lookup
[ 2.953985] of_get_named_gpiod_flags: can't parse 'reset-gpios' property of node '/pcie at 1e140000[2]'
[ 2.954000] of_get_named_gpiod_flags: can't parse 'reset-gpio' property of node '/pcie at 1e140000[2]'
[ 2.954011] mt7621-pci 1e140000.pcie: using lookup tables for GPIO lookup
[ 2.954019] mt7621-pci 1e140000.pcie: No GPIO consumer reset found
[ 3.053867] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
[ 3.064992] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
[ 3.175896] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK)
[ 3.189768] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
[ 3.203643] mt7621-pci 1e140000.pcie: PCIE1 enabled
[ 3.213373] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
[ 3.232132] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
[ 3.244820] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
[ 3.258527] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 3.272233] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 3.283209] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
[ 3.295226] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
[ 3.307723] pci 0000:00:00.0: reg 0x14: [mem 0x60200000-0x6020ffff]
[ 3.320294] pci 0000:00:00.0: supports D1
[ 3.328287] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[ 3.341226] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280
[ 3.353293] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit]
[ 3.366998] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5 GT/s x1 link)
[ 3.395633] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[ 3.406073] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff]
[ 3.418220] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 3.431784] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
[ 3.446184] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 3.459414] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[ 3.472600] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[ 3.486479] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[ 3.500016] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
[ 3.514411] pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
[ 3.527951] pci 0000:00:00.0: BAR 7: assigned [io 0x1e160000-0x1e160fff]
[ 3.541489] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[ 3.556077] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 3.565975] pci 0000:00:00.0: bridge window [io 0x1e160000-0x1e160fff]
[ 3.579504] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 3.593037] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
[ 27.217458] pci 0000:00:00.0: enabling device (0006 -> 0007)
[ 27.217158] mt7615e 0000:01:00.0: no of_node; not parsing pinctrl DT
[ 27.228879] mt7615e 0000:01:00.0: enabling device (0000 -> 0002)
[ 48.339930] mt7615e 0000:01:00.0: Message -16 (seq 1) timeout
[ 48.351648] mt7615e 0000:01:00.0: Failed to get patch semaphore
Old one:
[ 0.485984] pinctrl core: add 0 pinctrl maps
[ 0.486122] pull PCIe RST: RALINK_RSTCTRL = 4000000
[ 0.796269] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.806339] ***** Xtal 40MHz *****
[ 0.813088] release PCIe RST: RALINK_RSTCTRL = 7000000
[ 0.823274] Port 0 N_FTS = 1b102800
[ 0.830192] Port 1 N_FTS = 1b105000
[ 0.837098] Port 2 N_FTS = 1b102800
[ 1.996201] PCIE0 no card, disable it(RST&CLK)
[ 2.004889] PCIE2 no card, disable it(RST&CLK)
[ 2.013710] -> 20107f2
[ 2.018538] PCIE1 enabled
[ 2.023741] PCI host bridge /pcie at 1e140000 ranges:
[ 2.033254] MEM 0x0000000060000000..0x000000006fffffff
[ 2.043611] IO 0x000000001e160000..0x000000001e16ffff
[ 2.053972] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000
[ 2.090621] PCI host bridge to bus 0000:00
[ 2.098694] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 2.112302] pci_bus 0000:00: root bus resource [io 0xffffffff]
[ 2.124051] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[ 2.137531] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[ 2.153311] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
[ 2.165216] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
[ 2.177626] pci 0000:00:00.0: reg 0x14: [mem 0x60200000-0x6020ffff]
[ 2.190148] pci 0000:00:00.0: supports D1
[ 2.198007] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[ 2.210986] pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280
[ 2.222866] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit]
[ 2.236456] pci 0000:01:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x1 link at 0000:00:00.0 (capable of 4.000 Gb/s with 5 GT/s x1 link)
[ 2.265021] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 2.278056] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 01
[ 2.291228] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[ 2.304303] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[ 2.318134] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[ 2.331609] pci 0000:00:00.0: BAR 1: assigned [mem 0x60100000-0x6010ffff]
[ 2.345105] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[ 2.359618] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 2.369453] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 28.431245] mt7615e 0000:01:00.0: no of_node; not parsing pinctrl DT
[ 28.431356] bus=0x1, slot = 0x0, irq=0x0
[ 28.446867] ieee80211 phy0: Selected rate control algorithm 'minstrel_ht'
[ 28.454151] usbcore: registered new interface driver pl2303
[ 28.461703] mt7615e 0000:01:00.0: HW/SW Version: 0x8a108a10, Build Time: 20180518100604a
[ 28.831598] mt7615e 0000:01:00.0: N9 Firmware Version: 2.0, Build Time: 20200131181812
[ 28.864922] mt7615e 0000:01:00.0: CR4 Firmware Version: _reserved_, Build Time: 20190121161307
lspci new:
00:00.0 PCI bridge: Device 0e8d:0801 (rev 01) (prog-if 00 [Normal decode])
Device tree node: /sys/firmware/devicetree/base/pcie at 1e140000/pcie at 0,0
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 255
Region 1: Memory at 60200000 (32-bit, non-prefetchable) [size=64K]
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: 00000000-00000fff [size=4K]
Memory behind bridge: 60000000-600fffff [size=1M]
Prefetchable memory behind bridge: 60100000-601fffff [size=1M]
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us
ClockPM- Surprise- LLActRep+ BwNot- ASPMOptComp-
LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s (ok), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
AtomicOpsCtl: ReqEn- EgressBlck-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
RootCmd: CERptEn- NFERptEn- FERptEn-
RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0
ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000
Capabilities: [140 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
lspci: Unable to load libkmod resources: error -12
01:00.0 Unclassified device [0002]: MEDIATEK Corp. Device 7615 (prog-if 80)
Subsystem: Device 7615:14c3
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+
Latency: 0
Interrupt: pin A routed to IRQ 23
Region 0: Memory at 60000000 (64-bit, non-prefetchable) [size=1M]
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [80] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <2us, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0.000W
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <2us
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
AtomicOpsCtl: ReqEn-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Kernel driver in use: mt7615e
lspci old:
00:00.0 PCI bridge: Device 0e8d:0801 (rev 01) (prog-if 00 [Normal decode])
Device tree node: /sys/firmware/devicetree/base/pcie at 1e140000/pcie at 0,0
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0
Interrupt: pin A routed to IRQ 255
Region 1: Memory at 60100000 (32-bit, non-prefetchable) [size=64K]
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
I/O behind bridge: None
Memory behind bridge: 60000000-600fffff [size=1M]
Prefetchable memory behind bridge: None
Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
BridgeCtl: Parity- SERR+ NoISA- VGA- VGA16- MAbort- >Reset- FastB2B-
PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
Capabilities: [40] Power Management version 3
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold-)
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0
ExtTag- RBE+
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
MaxPayload 128 bytes, MaxReadReq 512 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us
ClockPM- Surprise- LLActRep+ BwNot- ASPMOptComp-
LnkCtl: ASPM Disabled; RCB 128 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s (ok), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
RootCap: CRSVisible-
RootSta: PME ReqID 0000, PMEStatus- PMEPending-
DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
AtomicOpsCtl: ReqEn- EgressBlck-
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Advanced Error Reporting
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr-
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- AdvNonFatalErr+
AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- ECRCChkCap+ ECRCChkEn-
MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
HeaderLog: 00000000 00000000 00000000 00000000
RootCmd: CERptEn- NFERptEn- FERptEn-
RootSta: CERcvd- MultCERcvd- UERcvd- MultUERcvd-
FirstFatal- NonFatalMsg- FatalMsg- IntMsg 0
ErrorSrc: ERR_COR: 0000 ERR_FATAL/NONFATAL: 0000
Capabilities: [140 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
lspci: Unable to load libkmod resources: error -12
01:00.0 Unclassified device [0002]: MEDIATEK Corp. Device 7615 (prog-if 80)
Subsystem: Device 7615:14c3
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 0, Cache Line Size: 80 bytes
Interrupt: pin A routed to IRQ 24
Region 0: Memory at 60000000 (64-bit, non-prefetchable) [size=1M]
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
Address: 0000000000000000 Data: 0000
Capabilities: [78] Power Management version 3
Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
Capabilities: [80] Express (v2) Endpoint, MSI 00
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <2us, L1 <2us
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset- SlotPowerLimit 0.000W
DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
MaxPayload 128 bytes, MaxReadReq 128 bytes
DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <64ns, L1 <2us
ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk-
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
LnkSta: Speed 2.5GT/s (downgraded), Width x1 (ok)
TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
DevCap2: Completion Timeout: Not Supported, TimeoutDis-, LTR-, OBFF Not Supported
AtomicOpsCap: 32bit- 64bit- 128bitCAS-
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
AtomicOpsCtl: ReqEn-
LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
Compliance De-emphasis: -6dB
LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
Capabilities: [100 v1] Virtual Channel
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
Arb: Fixed- WRR32- WRR64- WRR128-
Ctrl: ArbSelect=Fixed
Status: InProgress-
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
Status: NegoPending- InProgress-
Kernel driver in use: mt7615e
cat /proc/interrupts new:
CPU0 CPU1 CPU2 CPU3
8: 75188 75268 75341 75246 MIPS GIC Local 1 timer
9: 24413 0 0 0 MIPS GIC 63 IPI call
10: 0 4442 0 0 MIPS GIC 64 IPI call
11: 0 0 33324 0 MIPS GIC 65 IPI call
12: 0 0 0 4574 MIPS GIC 66 IPI call
13: 3424 0 0 0 MIPS GIC 67 IPI resched
14: 0 4124 0 0 MIPS GIC 68 IPI resched
15: 0 0 3974 0 MIPS GIC 69 IPI resched
16: 0 0 0 4150 MIPS GIC 70 IPI resched
17: 0 0 0 0 MIPS GIC 19 1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
19: 829 0 0 0 MIPS GIC 33 ttyS0
20: 0 0 0 0 MIPS GIC 29 xhci-hcd:usb1
21: 817 0 0 0 MIPS GIC 10 1e100000.ethernet
23: 0 0 0 0 MIPS GIC 11 mt7615e
ERR: 1
cat /proc/interrupts old:
CPU0 CPU1 CPU2 CPU3
8: 25513 25556 25674 25681 MIPS GIC Local 1 timer
9: 23603 0 0 0 MIPS GIC 63 IPI call
10: 0 4383 0 0 MIPS GIC 64 IPI call
11: 0 0 32117 0 MIPS GIC 65 IPI call
12: 0 0 0 4189 MIPS GIC 66 IPI call
13: 3428 0 0 0 MIPS GIC 67 IPI resched
14: 0 4144 0 0 MIPS GIC 68 IPI resched
15: 0 0 3812 0 MIPS GIC 69 IPI resched
16: 0 0 0 3769 MIPS GIC 70 IPI resched
17: 0 0 0 0 MIPS GIC 19 1e000600.gpio-bank0, 1e000600.gpio-bank1, 1e000600.gpio-bank2
19: 1022 0 0 0 MIPS GIC 33 ttyS0
20: 0 0 0 0 MIPS GIC 29 xhci-hcd:usb1
21: 269 0 0 0 MIPS GIC 10 1e100000.ethernet
24: 1131 0 0 0 MIPS GIC 31 mt7615e
ERR: 0
=> Interesting, different interrupts.
Diff DTS old to new driver:
diff --git b/target/linux/ramips/dts/mt7621.dtsi a/target/linux/ramips/dts/mt7621.dtsi
index 0bf1069b5c..63befa1fdc 100644
--- b/target/linux/ramips/dts/mt7621.dtsi
+++ a/target/linux/ramips/dts/mt7621.dtsi
@@ -557,9 +550,10 @@
pcie: pcie at 1e140000 {
compatible = "mediatek,mt7621-pci";
- reg = <0x1e140000 0x100
- 0x1e142000 0x100>;
-
+ reg = <0x1e140000 0x100 /* host-pci bridge registers */
+ 0x1e142000 0x100 /* pcie port 0 RC control registers */
+ 0x1e143000 0x100 /* pcie port 1 RC control registers */
+ 0x1e144000 0x100>; /* pcie port 2 RC control registers */
#address-cells = <3>;
#size-cells = <2>;
@@ -574,10 +568,11 @@
0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */
>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
- GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
- GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0xF0000 0 0 1>;
+ interrupt-map = <0x10000 0 0 1 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,
+ <0x20000 0 0 1 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>,
+ <0x30000 0 0 1 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
@@ -585,32 +580,45 @@
reset-names = "pcie0", "pcie1", "pcie2";
clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
clock-names = "pcie0", "pcie1", "pcie2";
+ phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
+ phy-names = "pcie-phy0", "pcie-phy2";
+
+ reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
pcie0: pcie at 0,0 {
reg = <0x0000 0 0 0 0>;
-
#address-cells = <3>;
#size-cells = <2>;
-
ranges;
+ bus-range = <0x00 0xff>;
};
pcie1: pcie at 1,0 {
reg = <0x0800 0 0 0 0>;
-
#address-cells = <3>;
#size-cells = <2>;
-
ranges;
+ bus-range = <0x00 0xff>;
};
pcie2: pcie at 2,0 {
reg = <0x1000 0 0 0 0>;
-
#address-cells = <3>;
#size-cells = <2>;
-
ranges;
+ bus-range = <0x00 0xff>;
};
};
+
+ pcie0_phy: pcie-phy at 1e149000 {
+ compatible = "mediatek,mt7621-pci-phy";
+ reg = <0x1e149000 0x0700>;
+ #phy-cells = <1>;
+ };
+
+ pcie2_phy: pcie-phy at 1e14a000 {
+ compatible = "mediatek,mt7621-pci-phy";
+ reg = <0x1e14a000 0x0700>;
+ #phy-cells = <1>;
+ };
};
Why are the interupts mapped a different way? I do not understand that.
Kind regards,
André
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