[OpenWrt-Devel] [PATCH 4/5] ath79: ag71xx: Ensure that appending of CRC to frames is always disabled

[Petr Štetiar]

There seems to be some strange behaviour between snapshot ar71xx and
ath79 kernels on Nanostation M5 XW where each kernel has different init
values in ag71xx_probe:

ar71xx: (running r8651-452b840)
  ( boot )
  eth%d: mac_cfg1=00000000, mac_cfg2=00007000, ipg=40605060, hdx=00a1f037, mfl=00000600
  ( ag71xx_hw_setup )
  eth%d: mac_cfg1=0000000f, mac_cfg2=00007014, ipg=40605060, hdx=00a1f037, mfl=00000000

ath79: (running r8651-452b840)
  ( boot )
  eth%d: mac_cfg1=0000000f, mac_cfg2=00007117, ipg=40605060, hdx=00a1f037, mfl=00000600
  ( ag71xx_hw_setup )
  eth%d: mac_cfg1=0000000f, mac_cfg2=00007117, ipg=40605060, hdx=00a1f037, mfl=00000000

Note the boot/init values of AG71XX_REG_MAC_CFG2 on ar71xx and ath79. On
ar71xx we've the cfg2=0x7000 after the boot, which corresponds to the
state in the datasheet, but on ath79 it's set to 0x7117 which
unfortunately enables CRC in the frames, making the networking
disfuctional on Nanostation M5 XW.

This is happening on the same hardware, same U-Boot, network setup etc.
the only difference in the mix are the kernels.

So the fix seems to be always clearing the MAC_CFG2_CRC_EN bit in
AG71XX_REG_MAC_CFG2 upon boot. I don't want to fix it by writing
init/reset value of 0x7000 to AG71XX_REG_MAC_CFG2 as it's being done
with AG71XX_REG_MAC_CFG1 register, since I only have datasheet for
ar9344 so I don't know what this forced 0x7000 initial value might cause
on other ar934x SoCs.

Tested-by: Joe Ayers <ae6xe at arrl.net>
Signed-off-by: Petr Štetiar <ynezz at true.cz>
---
 .../ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
index 70ca024..0ca0d18 100644
--- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
+++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
@@ -425,14 +425,18 @@ static void ag71xx_hw_setup(struct ag71xx *ag)
 {
 	struct device_node *np = ag->pdev->dev.of_node;
 	u32 init = MAC_CFG1_INIT;
+	u32 cfg2;
 
 	/* setup MAC configuration registers */
 	if (of_property_read_bool(np, "flow-control"))
 		init |= MAC_CFG1_TFC | MAC_CFG1_RFC;
 	ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, init);
 
-	ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
-		  MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
+	/* ensure that CRC is disabled and not appended to frames */
+	cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
+	cfg2 &= ~(MAC_CFG2_CRC_EN);
+	cfg2 |= MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK;
+	ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
 
 	/* setup max frame length to zero */
 	ag71xx_wr(ag, AG71XX_REG_MAC_MFL, 0);
-- 
1.9.1


_______________________________________________
openwrt-devel mailing list
openwrt-devel at lists.openwrt.org
https://lists.openwrt.org/mailman/listinfo/openwrt-devel