[OpenWrt-Devel] [PATCH 00/22] Conversion of ARMv4 Gemini to DT and multiplatform

[Hans Ulli Kroll]

Hi Florian, Linus,

sorry for delay, busy last week ...

On Tue, 24 Jan 2017, Florian Fainelli wrote:

> On 01/24/2017 12:47 PM, Linus Walleij wrote:
> > Hans, Florian et al: does any of you have a copy of the kernel source
> > dump(s) from Teltonika, Raidsonic or Wiliboard?
> > 
> > Would be nice to have the stuff that vendors are using.
> > 
> > On Tue, Jan 24, 2017 at 6:24 PM, Hans Ulli Kroll
> > <ulli.kroll at googlemail.com> wrote:
> > 
> >> AFAICR
> >> This is a dual GMAC !
> >>
> >> They are two different base address for each GMAC and one shared
> >> base address for both of them.
> >> This is all in one address space which remaps the driver.
> >>
> >> And to make it worse two interrupt lines, one of them is also shared.
> >>
> >> Any ideas to "convert" this into DT ??
> >> Because I think it's impossible to split both GMAC interfaces ??
> > 
> > Sounds odd.  Yeah hardware.h lists this:
> > 
> > #define GEMINI_TOE_BASE         0x60000000
> > #define GEMINI_GMAC0_BASE       0x6000A000
> > #define GEMINI_GMAC1_BASE       0x6000E000
> > 
> > I guess one approach is to make a driver handling all of it in one,
> > let it ioremap all regions and support one or two GMACs on the same
> > TOE. More complex solutions is to share the TOE using
> > syscons regmap mechanism but it looks cumbersome.
> > 
> > {
> >    compatible = "cortina,genesis-gmac-ethernet";
> >    reg = <0x60000000 0xa000>, <0x6000a000 0x4000>, <0x6000e000 0x4000>;
> >    interrupts = <1 IRQ_TYPE_LEVEL_HIGH>, <2 IRQ_TYPE_LEVEL_HIGH>;
> > }
> > 
> > Or something like that?
> 

For addresses, base is here, for both interfaces
#define GEMINI_TOE_BASE			0x60000000
and now for each interface, offset to the above
code is from the headerfile of the openwrt driver.
#define TOE_GMAC_DMA_BASE(x)		(0x8000 + 0x4000 * (x))
#define TOE_GMAC_BASE(x)		(0xA000 + 0x4000 * (x))

maybe some other registers to
#define TOE_NONTOE_QUE_HDR_BASE		0x2000
#define TOE_TOE_QUE_HDR_BASE		0x3000
#define TOE_V_BIT_BASE			0x4000
#define TOE_A_BIT_BASE			0x6000

AFAICR 
The TOE part was "invented" for the gigabit interface.
They need to speed up the NIC because without TCP offloading you will get 
only fast ethernet speed on a gigabit NIC.

> I'd recommend looking at how mv643xx_eth does it, there are shared and
> individual portions of the register set in there, with concepts of
> "ports" which result in network device instances.

Thanks will look at it.

Hans
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