[OpenWrt-Devel] [PATCH 2/5] lantiq/xrx200-net: fix PCE_MAPx handling

Martin Schiller mschiller at tdt.de
Thu Feb 18 08:13:13 EST 2016


Remove unnecessary MPMAP (PCE_MAP1) initialization and make DMCPMAP (PCE_MAP2)
and UUCMAP (PCE_MAP3) configurable from user space.

Signed-off-by: Martin Schiller <mschiller at tdt.de>
---
 .../0025-NET-MIPS-lantiq-adds-xrx200-net.patch     | 42 ++++++++++++++--------
 1 file changed, 28 insertions(+), 14 deletions(-)

diff --git a/target/linux/lantiq/patches-4.4/0025-NET-MIPS-lantiq-adds-xrx200-net.patch b/target/linux/lantiq/patches-4.4/0025-NET-MIPS-lantiq-adds-xrx200-net.patch
index 8c8513b..0b2dae3 100644
--- a/target/linux/lantiq/patches-4.4/0025-NET-MIPS-lantiq-adds-xrx200-net.patch
+++ b/target/linux/lantiq/patches-4.4/0025-NET-MIPS-lantiq-adds-xrx200-net.patch
@@ -209,7 +209,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
 +};
 --- /dev/null
 +++ b/drivers/net/ethernet/lantiq_xrx200.c
-@@ -0,0 +1,1801 @@
+@@ -0,0 +1,1815 @@
 +/*
 + *   This program is free software; you can redistribute it and/or modify it
 + *   under the terms of the GNU General Public License version 2 as published
@@ -963,12 +963,25 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
 +// attributes
 +static struct switch_attr xrx200sw_globals[] = {
 +	{
++		XRX200_GLOBAL_REGATTR(XRX200_PCE_PMAP_2_DMCPMAP),
++		.name = "dmcpmap",
++		.description = "Default Multicast/Broadcast Port Map",
++		.max = 0x7F,
++	},
++	{
++		XRX200_GLOBAL_REGATTR(XRX200_PCE_PMAP_3_UUCMAP),
++		.name = "uucmap",
++		.description = "Default Unknown Unicast Port Map",
++		.max = 0x7F,
++	},
++	{
 +		.type = SWITCH_TYPE_INT,
 +		.set = xrx200_set_vlan_mode_enable,
 +		.get = xrx200_get_vlan_mode_enable,
 +		.name = "enable_vlan",
 +		.description = "Enable VLAN mode",
-+		.max = 1},
++		.max = 1,
++	},
 +};
 +
 +static struct switch_attr xrx200sw_port[] = {
@@ -1693,11 +1706,12 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
 +	/* load the pce microcode */
 +	xrx200_pci_microcode();
 +
-+	/* Default unknown Broadcat/Multicast/Unicast port maps */
-+	ltq_switch_w32(0x7f, PCE_PMAP1);
-+	ltq_switch_w32(0x7f, PCE_PMAP2);
-+	ltq_switch_w32(0x7f, PCE_PMAP3);
++	/* Default unknown Multicast/Broadcast port map (DMCPMAP) */
++	ltq_switch_w32(0x7F, PCE_PMAP2);
 +
++	/* Default unknown Unicast port map (UUCMAP) */
++	ltq_switch_w32(0x7F, PCE_PMAP3);
++ 
 +	/* RMON Counter Enable for all physical ports */
 +	for (i = 0; i < 7; i++)
 +		ltq_switch_w32(0x1, BM_PCFG(i));
@@ -2295,10 +2309,10 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
 +//	XRX200_PCE_AGE_1_MANT,         /* Aging Counter Mantissa Value  */
 +//	XRX200_PCE_PMAP_1,             /* Port Map Register 1 */
 +//	XRX200_PCE_PMAP_1_MPMAP,       /* Monitoring Port Map */
-+//	XRX200_PCE_PMAP_2,             /* Port Map Register 2 */
-+//	XRX200_PCE_PMAP_2_DMCPMAP,     /* Default Multicast Port Map */
-+//	XRX200_PCE_PMAP_3,             /* Port Map Register 3 */
-+//	XRX200_PCE_PMAP_3_UUCMAP,      /* Default Unknown Unicast Port Map */
++	XRX200_PCE_PMAP_2,             /* Port Map Register 2 */
++	XRX200_PCE_PMAP_2_DMCPMAP,     /* Default Multicast Port Map */
++	XRX200_PCE_PMAP_3,             /* Port Map Register 3 */
++	XRX200_PCE_PMAP_3_UUCMAP,      /* Default Unknown Unicast Port Map */
 +//	XRX200_PCE_GCTRL_0,            /* PCE Global Control Register0 */
 +//	XRX200_PCE_GCTRL_0_IGMP,       /* IGMP Mode Selection */
 +	XRX200_PCE_GCTRL_0_VLAN,       /* VLAN-aware Switching */
@@ -2951,10 +2965,10 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
 +//	{0x1148,	 0,	16,	0x00}, /* XRX200_PCE_AGE_1_MANT          Aging Counter Mantissa Value  */
 +//	{0x114C,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_1              Port Map Register 1 */
 +//	{0x114C,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_1_MPMAP        Monitoring Port Map */
-+//	{0x1150,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_2              Port Map Register 2 */
-+//	{0x1150,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_2_DMCPMAP      Default Multicast Port Map */
-+//	{0x1154,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_3              Port Map Register 3 */
-+//	{0x1154,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_3_UUCMAP       Default Unknown Unicast Port Map */
++	{0x1150,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_2              Port Map Register 2 */
++	{0x1150,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_2_DMCPMAP      Default Multicast Port Map */
++	{0x1154,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_3              Port Map Register 3 */
++	{0x1154,	 0,	16,	0x00}, /* XRX200_PCE_PMAP_3_UUCMAP       Default Unknown Unicast Port Map */
 +//	{0x1158,	 0,	16,	0x00}, /* XRX200_PCE_GCTRL_0             PCE Global Control Register0 */
 +//	{0x1158,	15,	 1,	0x00}, /* XRX200_PCE_GCTRL_0_IGMP        IGMP Mode Selection */
 +	{0x1158,	14,	 1,	0x00}, /* XRX200_PCE_GCTRL_0_VLAN        VLAN-aware Switching */
-- 
2.1.4
_______________________________________________
openwrt-devel mailing list
openwrt-devel at lists.openwrt.org
https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel



More information about the openwrt-devel mailing list