[OpenWrt-Devel] [PATCH v3 1/2] pinctrl/lantiq: introduce new dedicated tables

[Daniel Schwierzeck]

2015-11-17 13:48 GMT+01:00 Martin Schiller <mschiller at tdt.de>:
> This patch introduces new dedicated "pinctrl-ase", "pinctrl-danube",
> "pinctrl-xrx100" and "pinctrl-xrx200" configuration tables.
>
> Based on the newest Lantiq Hardware Description it turend out, that there are
> some differences in the GPIO alternative functions of the Danube, xRX100 and
> xRX200 families, which makes it impossible to use only one xway_mfp table.
>
> This patch is also the first step to add support for the xRX300 family.
>
> Signed-off-by: Martin Schiller <mschiller at tdt.de>
> ---
>  .../patches-3.18/0150-lantiq-pinctrl-xway.patch    | 1118 +++++++++++++++++++-
>  .../patches-4.1/0150-lantiq-pinctrl-xway.patch     | 1118 +++++++++++++++++++-
>  2 files changed, 2214 insertions(+), 22 deletions(-)
>

> ++
> ++static const unsigned xrx200_pins_usif_spi[] = {GPIO11, GPIO12, GPIO38};
> ++static const unsigned xrx200_pins_usif_spi_cs0[] = {GPIO37};
> ++static const unsigned xrx200_pins_usif_spi_cs1[] = {GPIO39};
> ++static const unsigned xrx200_pins_usif_spi_cs2[] = {GPIO14};
> ++

> ++
> ++static const unsigned xrx200_pins_spi[] = {GPIO16, GPIO17, GPIO18};
> ++static const unsigned xrx200_pins_spi_cs1[] = {GPIO15};
> ++static const unsigned xrx200_pins_spi_cs2[] = {GPIO22};
> ++static const unsigned xrx200_pins_spi_cs3[] = {GPIO13};
> ++static const unsigned xrx200_pins_spi_cs4[] = {GPIO10};
> ++static const unsigned xrx200_pins_spi_cs5[] = {GPIO9};
> ++static const unsigned xrx200_pins_spi_cs6[] = {GPIO11};
> ++

while you are at it, could you also add dedicated controls for the SPI
and USIF-SPI pins for all SoC's like:

static const unsigned xrx200_pins_usif_spi_di[] = {GPIO11};
static const unsigned xrx200_pins_usif_spi_do[] = {GPIO12};
static const unsigned xrx200_pins_usif_spi_clk[] = {GPIO38};

static const unsigned xrx200_pins_spi_di[] = {GPIO16};
static const unsigned xrx200_pins_spi_do[] = {GPIO17};
static const unsigned xrx200_pins_spi_clk[] = {GPIO18};

I have SPI and USIF-SPI drivers which are mostly ready for upstream
submission and their DT bindings depend on dedicated pin controls.

Thanks,
Daniel
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