[OpenWrt-Devel] [PATCH 05/10] imx6: add RS485 gpio-based txen support

Pushpal Sidhu psidhu at gateworks.com
Mon Dec 21 17:25:15 EST 2015


Signed-off-by: Tim Harvey <tharvey at gateworks.com>
---
 .../300-imx-serial-rs485-gpio-txen-support.patch   | 186 +++++++++++++++++++++
 ...1-imx-ventana-add-rs485-txen-gpio-support.patch |  60 +++++++
 2 files changed, 246 insertions(+)
 create mode 100644 target/linux/imx6/patches-4.3/300-imx-serial-rs485-gpio-txen-support.patch
 create mode 100644 target/linux/imx6/patches-4.3/301-imx-ventana-add-rs485-txen-gpio-support.patch

diff --git a/target/linux/imx6/patches-4.3/300-imx-serial-rs485-gpio-txen-support.patch b/target/linux/imx6/patches-4.3/300-imx-serial-rs485-gpio-txen-support.patch
new file mode 100644
index 0000000..156cdd6
--- /dev/null
+++ b/target/linux/imx6/patches-4.3/300-imx-serial-rs485-gpio-txen-support.patch
@@ -0,0 +1,186 @@
+Index: linux-4.3/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt
+===================================================================
+--- linux-4.3.orig/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt	2015-11-01 16:05:25.000000000 -0800
++++ linux-4.3/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt	2015-12-18 10:39:45.103158319 -0800
+@@ -6,6 +6,7 @@
+ - interrupts : Should contain uart interrupt
+ 
+ Optional properties:
++- fsl,rs485-gpio-txen : Indicate a GPIO is used as TXEN instead of RTS
+ - fsl,uart-has-rtscts : Indicate the uart has rts and cts
+ - fsl,irda-mode : Indicate the uart supports irda mode
+ - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
+Index: linux-4.3/drivers/tty/serial/imx.c
+===================================================================
+--- linux-4.3.orig/drivers/tty/serial/imx.c	2015-11-01 16:05:25.000000000 -0800
++++ linux-4.3/drivers/tty/serial/imx.c	2015-12-18 10:39:45.103158319 -0800
+@@ -21,6 +21,7 @@
+ #define SUPPORT_SYSRQ
+ #endif
+ 
++#include <linux/gpio.h>
+ #include <linux/module.h>
+ #include <linux/ioport.h>
+ #include <linux/init.h>
+@@ -37,6 +38,7 @@
+ #include <linux/slab.h>
+ #include <linux/of.h>
+ #include <linux/of_device.h>
++#include <linux/of_gpio.h>
+ #include <linux/io.h>
+ #include <linux/dma-mapping.h>
+ 
+@@ -203,6 +205,7 @@
+ 	unsigned short		trcv_delay; /* transceiver delay */
+ 	struct clk		*clk_ipg;
+ 	struct clk		*clk_per;
++	int			txen_gpio;
+ 	const struct imx_uart_data *devdata;
+ 
+ 	/* DMA fields */
+@@ -373,13 +376,21 @@
+ 	/* in rs485 mode disable transmitter if shifter is empty */
+ 	if (port->rs485.flags & SER_RS485_ENABLED &&
+ 	    readl(port->membase + USR2) & USR2_TXDC) {
+-		temp = readl(port->membase + UCR2);
+-		if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
+-			temp &= ~UCR2_CTS;
+-		else
+-			temp |= UCR2_CTS;
+-		writel(temp, port->membase + UCR2);
++		if (sport->txen_gpio != -1) {
++			if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
++				gpio_set_value(sport->txen_gpio, 1);
++			else
++				gpio_set_value(sport->txen_gpio, 0);
++		} else {
++			temp = readl(port->membase + UCR2);
++			if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
++				temp &= ~UCR2_CTS;
++			else
++				temp |= UCR2_CTS;
++			writel(temp, port->membase + UCR2);
++		}
+ 
++		/* disable shifter empty irq */
+ 		temp = readl(port->membase + UCR4);
+ 		temp &= ~UCR4_TCEN;
+ 		writel(temp, port->membase + UCR4);
+@@ -578,14 +589,22 @@
+ 	unsigned long temp;
+ 
+ 	if (port->rs485.flags & SER_RS485_ENABLED) {
+-		/* enable transmitter and shifter empty irq */
+-		temp = readl(port->membase + UCR2);
+-		if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
+-			temp &= ~UCR2_CTS;
+-		else
+-			temp |= UCR2_CTS;
+-		writel(temp, port->membase + UCR2);
++		/* enable transmitter */
++		if (sport->txen_gpio != -1) {
++			if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
++				gpio_set_value(sport->txen_gpio, 1);
++			else
++				gpio_set_value(sport->txen_gpio, 0);
++		} else {
++			temp = readl(port->membase + UCR2);
++			if (port->rs485.flags & SER_RS485_RTS_ON_SEND)
++				temp &= ~UCR2_CTS;
++			else
++				temp |= UCR2_CTS;
++			writel(temp, port->membase + UCR2);
++		}
+ 
++		/* enable shifter empty irq */
+ 		temp = readl(port->membase + UCR4);
+ 		temp |= UCR4_TCEN;
+ 		writel(temp, port->membase + UCR4);
+@@ -1303,7 +1322,9 @@
+ 		if (sport->have_rtscts) {
+ 			ucr2 &= ~UCR2_IRTS;
+ 
+-			if (port->rs485.flags & SER_RS485_ENABLED) {
++			if ((port->rs485.flags & SER_RS485_ENABLED) &&
++			    (sport->txen_gpio == -1))
++			{
+ 				/*
+ 				 * RTS is mandatory for rs485 operation, so keep
+ 				 * it under manual control and keep transmitter
+@@ -1312,9 +1333,8 @@
+ 				if (!(port->rs485.flags &
+ 				      SER_RS485_RTS_AFTER_SEND))
+ 					ucr2 |= UCR2_CTS;
+-			} else {
++			} else
+ 				ucr2 |= UCR2_CTSC;
+-			}
+ 
+ 			/* Can we enable the DMA support? */
+ 			if (is_imx6q_uart(sport) && !uart_console(port)
+@@ -1323,7 +1343,8 @@
+ 		} else {
+ 			termios->c_cflag &= ~CRTSCTS;
+ 		}
+-	} else if (port->rs485.flags & SER_RS485_ENABLED)
++	} else if (port->rs485.flags & SER_RS485_ENABLED &&
++	           sport->txen_gpio == -1)
+ 		/* disable transmitter */
+ 		if (!(port->rs485.flags & SER_RS485_RTS_AFTER_SEND))
+ 			ucr2 |= UCR2_CTS;
+@@ -1561,20 +1582,27 @@
+ 	rs485conf->flags |= SER_RS485_RX_DURING_TX;
+ 
+ 	/* RTS is required to control the transmitter */
+-	if (!sport->have_rtscts)
++	if (sport->txen_gpio == -1 && !sport->have_rtscts)
+ 		rs485conf->flags &= ~SER_RS485_ENABLED;
+ 
+ 	if (rs485conf->flags & SER_RS485_ENABLED) {
+-		unsigned long temp;
+-
+ 		/* disable transmitter */
+-		temp = readl(sport->port.membase + UCR2);
+-		temp &= ~UCR2_CTSC;
+-		if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
+-			temp &= ~UCR2_CTS;
+-		else
+-			temp |= UCR2_CTS;
+-		writel(temp, sport->port.membase + UCR2);
++		if (sport->txen_gpio != -1) {
++			if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
++				gpio_set_value(sport->txen_gpio, 1);
++			else
++				gpio_set_value(sport->txen_gpio, 0);
++		} else {
++			unsigned long temp;
++
++			temp = readl(sport->port.membase + UCR2);
++			temp &= ~UCR2_CTSC;
++			if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
++				temp &= ~UCR2_CTS;
++			else
++				temp |= UCR2_CTS;
++			writel(temp, sport->port.membase + UCR2);
++		}
+ 	}
+ 
+ 	port->rs485 = *rs485conf;
+@@ -1847,6 +1875,17 @@
+ 	if (of_get_property(np, "fsl,dte-mode", NULL))
+ 		sport->dte_mode = 1;
+ 
++	if (of_find_property(np, "fsl,rs485-gpio-txen", NULL))
++		sport->txen_gpio = of_get_named_gpio(np,
++						     "fsl,rs485-gpio-txen", 0);
++	else
++		sport->txen_gpio = -1;
++	if (gpio_is_valid(sport->txen_gpio))
++		devm_gpio_request_one(&pdev->dev, sport->txen_gpio,
++				      GPIOF_OUT_INIT_LOW, "rs485-txen");
++	else
++		sport->txen_gpio = -1;
++
+ 	sport->devdata = of_id->data;
+ 
+ 	return 0;
diff --git a/target/linux/imx6/patches-4.3/301-imx-ventana-add-rs485-txen-gpio-support.patch b/target/linux/imx6/patches-4.3/301-imx-ventana-add-rs485-txen-gpio-support.patch
new file mode 100644
index 0000000..07f0601
--- /dev/null
+++ b/target/linux/imx6/patches-4.3/301-imx-ventana-add-rs485-txen-gpio-support.patch
@@ -0,0 +1,60 @@
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi	2015-12-18 10:39:45.087158319 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi	2015-12-18 10:39:45.115158319 -0800
+@@ -372,6 +372,7 @@
+ &uart1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pinctrl_uart1>;
++	fsl,rs485-gpio-txen = <&gpio7 1 GPIO_ACTIVE_HIGH>;
+ 	status = "okay";
+ };
+ 
+@@ -544,6 +545,7 @@
+ 			fsl,pins = <
+ 				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
+ 				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
++				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
+ 			>;
+ 		};
+ 
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi	2015-12-18 10:39:45.087158319 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi	2015-12-18 10:39:45.115158319 -0800
+@@ -370,6 +370,7 @@
+ &uart1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pinctrl_uart1>;
++	fsl,rs485-gpio-txen = <&gpio7 1 GPIO_ACTIVE_HIGH>;
+ 	status = "okay";
+ };
+ 
+@@ -534,6 +535,7 @@
+ 			fsl,pins = <
+ 				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
+ 				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
++				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
+ 			>;
+ 		};
+ 
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi	2015-12-18 10:39:45.087158319 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi	2015-12-18 10:39:45.115158319 -0800
+@@ -471,6 +471,7 @@
+ &uart1 {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pinctrl_uart1>;
++	fsl,rs485-gpio-txen = <&gpio7 1 GPIO_ACTIVE_HIGH>;
+ 	status = "okay";
+ };
+ 
+@@ -641,6 +642,7 @@
+ 			fsl,pins = <
+ 				MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA	0x1b0b1
+ 				MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA	0x1b0b1
++				MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x4001b0b1 /* TEN */
+ 			>;
+ 		};
+ 
-- 
2.6.4
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