[OpenWrt-Devel] [PATCH 6/9] ramips: Fix CM_GCR_CPC_BASE_CPCBASE_{MSK, SHF} values
John Crispin
blogic at openwrt.org
Fri Dec 11 01:48:48 EST 2015
Hi,
On 11/12/2015 05:01, Nikolay Martynov wrote:
> Update CM_GCR_CPC_BASE_CPCBASE_{MSK,SHF} to match datasheet
>
do you mean the GIC or the mt7621 datasheet ? is this a mt7621 specific
change or is this an upstream bug that we need to submit a patch for ?
John
> Signed-off-by: Nikolay Martynov <mar.kolya at gmail.com>
> ---
> .../ramips/patches-4.3/0059-correct-CPC_BASE_MASK.patch | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
> create mode 100644 target/linux/ramips/patches-4.3/0059-correct-CPC_BASE_MASK.patch
>
> diff --git a/target/linux/ramips/patches-4.3/0059-correct-CPC_BASE_MASK.patch b/target/linux/ramips/patches-4.3/0059-correct-CPC_BASE_MASK.patch
> new file mode 100644
> index 0000000..b267137
> --- /dev/null
> +++ b/target/linux/ramips/patches-4.3/0059-correct-CPC_BASE_MASK.patch
> @@ -0,0 +1,13 @@
> +--- a/arch/mips/include/asm/mips-cm.h
> ++++ b/arch/mips/include/asm/mips-cm.h
> +@@ -270,8 +270,8 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
> + #define CM_GCR_GIC_BASE_GICEN_MSK (_ULCAST_(0x1) << 0)
> +
> + /* GCR_CPC_BASE register fields */
> +-#define CM_GCR_CPC_BASE_CPCBASE_SHF 17
> +-#define CM_GCR_CPC_BASE_CPCBASE_MSK (_ULCAST_(0x7fff) << 17)
> ++#define CM_GCR_CPC_BASE_CPCBASE_SHF 15
> ++#define CM_GCR_CPC_BASE_CPCBASE_MSK (_ULCAST_(0x1ffff) << 15)
> + #define CM_GCR_CPC_BASE_CPCEN_SHF 0
> + #define CM_GCR_CPC_BASE_CPCEN_MSK (_ULCAST_(0x1) << 0)
> +
>
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