[OpenWrt-Devel] [PATCH v2 2/4] mpc85xx: move newly created files from patch files to files directory
Matthias Schiffer
mschiffer at universe-factory.net
Thu Apr 30 16:31:42 EDT 2015
This will make these files much more maintainable.
Signed-off-by: Matthias Schiffer <mschiffer at universe-factory.net>
---
.../files/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 168 +++++++
.../files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 212 ++++++++
.../arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 ++++++
.../140-powerpc-85xx-tl-wdr4900-v1-support.patch | 537 ---------------------
.../142-add-mpic-timer-clock-frequency.patch | 48 --
5 files changed, 525 insertions(+), 585 deletions(-)
create mode 100644 target/linux/mpc85xx/files/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
create mode 100644 target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
create mode 100644 target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
delete mode 100644 target/linux/mpc85xx/patches-3.18/142-add-mpic-timer-clock-frequency.patch
diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c b/target/linux/mpc85xx/files/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
new file mode 100644
index 0000000..17459ef
--- /dev/null
+++ b/target/linux/mpc85xx/files/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
@@ -0,0 +1,168 @@
+/*
+ * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
+ *
+ * Copyright (c) 2013 Gabor Juhos <juhosg at openwrt.org>
+ *
+ * Based on:
+ * cuboot-85xx.c
+ * Author: Scott Wood <scottwood at freescale.com>
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * simpleboot.c
+ * Authors: Scott Wood <scottwood at freescale.com>
+ * Grant Likely <grant.likely at secretlab.ca>
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2008 Secret Lab Technologies Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "types.h"
+#include "io.h"
+#include "stdio.h"
+#include <libfdt.h>
+
+BSS_STACK(4*1024);
+
+static unsigned long bus_freq;
+static unsigned long int_freq;
+static u64 mem_size;
+static unsigned char enetaddr[6];
+
+static void process_boot_dtb(void *boot_dtb)
+{
+ const u32 *na, *ns, *reg, *val32;
+ const char *path;
+ u64 memsize64;
+ int node, size, i;
+
+ /* Make sure FDT blob is sane */
+ if (fdt_check_header(boot_dtb) != 0)
+ fatal("Invalid device tree blob\n");
+
+ /* Find the #address-cells and #size-cells properties */
+ node = fdt_path_offset(boot_dtb, "/");
+ if (node < 0)
+ fatal("Cannot find root node\n");
+ na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
+ if (!na || (size != 4))
+ fatal("Cannot find #address-cells property");
+
+ ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
+ if (!ns || (size != 4))
+ fatal("Cannot find #size-cells property");
+
+ /* Find the memory range */
+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
+ "memory", sizeof("memory"));
+ if (node < 0)
+ fatal("Cannot find memory node\n");
+ reg = fdt_getprop(boot_dtb, node, "reg", &size);
+ if (size < (*na+*ns) * sizeof(u32))
+ fatal("cannot get memory range\n");
+
+ /* Only interested in memory based at 0 */
+ for (i = 0; i < *na; i++)
+ if (*reg++ != 0)
+ fatal("Memory range is not based at address 0\n");
+
+ /* get the memsize and trucate it to under 4G on 32 bit machines */
+ memsize64 = 0;
+ for (i = 0; i < *ns; i++)
+ memsize64 = (memsize64 << 32) | *reg++;
+ if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
+ memsize64 = 0xffffffff;
+
+ mem_size = memsize64;
+
+ /* get clock frequencies */
+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
+ "cpu", sizeof("cpu"));
+ if (!node)
+ fatal("Cannot find cpu node\n");
+
+ val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
+ if (!val32 || (size != 4))
+ fatal("Cannot get clock frequency");
+
+ int_freq = *val32;
+
+ val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
+ if (!val32 || (size != 4))
+ fatal("Cannot get bus frequency");
+
+ bus_freq = *val32;
+
+ path = fdt_get_alias(boot_dtb, "ethernet0");
+ if (path) {
+ const void *p;
+
+ node = fdt_path_offset(boot_dtb, path);
+ if (node < 0)
+ fatal("Cannot find ethernet0 node");
+
+ p = fdt_getprop(boot_dtb, node, "mac-address", &size);
+ if (!p || (size < 6)) {
+ printf("no mac-address property, finding local\n\r");
+ p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
+ }
+
+ if (!p || (size < 6))
+ fatal("cannot get MAC addres");
+
+ memcpy(enetaddr, p, sizeof(enetaddr));
+ }
+}
+
+static void platform_fixups(void)
+{
+ void *soc, *mpic;
+
+ dt_fixup_memory(0, mem_size);
+
+ dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
+ dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
+
+ /* Unfortunately, the specific model number is encoded in the
+ * soc node name in existing dts files -- once that is fixed,
+ * this can do a simple path lookup.
+ */
+ soc = find_node_by_devtype(NULL, "soc");
+ if (soc) {
+ void *serial = NULL;
+
+ setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
+
+ while ((serial = find_node_by_devtype(serial, "serial"))) {
+ if (get_parent(serial) != soc)
+ continue;
+
+ setprop(serial, "clock-frequency", &bus_freq,
+ sizeof(bus_freq));
+ }
+ }
+
+ mpic = find_node_by_compatible(NULL, "fsl,mpic");
+ if (mpic)
+ setprop(mpic, "clock-frequency", &bus_freq, sizeof(bus_freq));
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ mem_size = 64 * 1024 * 1024;
+
+ simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
+
+ fdt_init(_dtb_start);
+ serial_console_init();
+
+ printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
+
+ process_boot_dtb((void *) r3);
+
+ platform_ops.fixups = platform_fixups;
+}
diff --git a/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
new file mode 100644
index 0000000..49e516c
--- /dev/null
+++ b/target/linux/mpc85xx/files/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
@@ -0,0 +1,212 @@
+/*
+ * TP-Link TL-WDR4900 v1 Device Tree Source
+ *
+ * Copyright 2013 Gabor Juhos <juhosg at openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1010si-pre.dtsi"
+
+/ {
+ model = "TP-Link TL-WDR4900 v1";
+ compatible = "tp-link,TL-WDR4900v1";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+/*
+ linux,stdout-path = "/soc at ffe00000/serial at 4500";
+*/
+ };
+
+ aliases {
+ spi0 = &spi0;
+ };
+
+ memory {
+ device_type = "memory";
+ };
+
+ soc: soc at ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+ spi0: spi at 7000 {
+ flash at 0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25fl129p1";
+ reg = <0>;
+ spi-max-frequency = <25000000>;
+
+ u-boot at 0 {
+ reg = <0x0 0x0050000>;
+ label = "u-boot";
+ read-only;
+ };
+
+ dtb at 50000 {
+ reg = <0x00050000 0x00010000>;
+ label = "dtb";
+ read-only;
+ };
+
+ kernel at 60000 {
+ reg = <0x00060000 0x002a0000>;
+ label = "kernel";
+ };
+
+ rootfs at 300000 {
+ reg = <0x00300000 0x00ce0000>;
+ label = "rootfs";
+ };
+
+ config at fe0000 {
+ reg = <0x00fe0000 0x00010000>;
+ label = "config";
+ read-only;
+ };
+
+ caldata at ff0000 {
+ reg = <0x00ff0000 0x00010000>;
+ label = "caldata";
+ read-only;
+ };
+
+ firmware at 60000 {
+ reg = <0x00060000 0x00f80000>;
+ label = "firmware";
+ };
+ };
+ };
+
+ gpio0: gpio-controller at f000 {
+ };
+
+ usb at 22000 {
+ phy_type = "utmi";
+ dr_mode = "host";
+ };
+
+ mdio at 24000 {
+ phy0: ethernet-phy at 0 {
+ reg = <0x0>;
+ qca,ar8327-initvals = <
+ 0x00004 0x07600000 /* PAD0_MODE */
+ 0x00008 0x00000000 /* PAD5_MODE */
+ 0x0000c 0x01000000 /* PAD6_MODE */
+ 0x00010 0x40000000 /* POWER_ON_STRIP */
+ 0x00050 0xcf35cf35 /* LED_CTRL0 */
+ 0x00054 0xcf35cf35 /* LED_CTRL1 */
+ 0x00058 0xcf35cf35 /* LED_CTRL2 */
+ 0x0005c 0x03ffff00 /* LED_CTRL3 */
+ 0x0007c 0x0000007e /* PORT0_STATUS */
+ >;
+ };
+ };
+
+ mdio at 25000 {
+ status = "disabled";
+ };
+
+ mdio at 26000 {
+ status = "disabled";
+ };
+
+ enet0: ethernet at b0000 {
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ enet1: ethernet at b1000 {
+ status = "disabled";
+ };
+
+ enet2: ethernet at b2000 {
+ status = "disabled";
+ };
+
+ sdhc at 2e000 {
+ status = "disabled";
+ };
+
+ serial1: serial at 4600 {
+ status = "disabled";
+ };
+
+ can0: can at 1c000 {
+ status = "disabled";
+ };
+
+ can1: can at 1d000 {
+ status = "disabled";
+ };
+ };
+
+ pci0: pcie at ffe09000 {
+ reg = <0 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ pcie at 0 {
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie at ffe0a000 {
+ reg = <0 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie at 0 {
+ ranges = <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ ifc: ifc at ffe1e000 {
+ status = "disabled";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ system {
+ gpios = <&gpio0 2 1>; /* active low */
+ label = "tp-link:blue:system";
+ };
+
+ usb1 {
+ gpios = <&gpio0 3 1>; /* active low */
+ label = "tp-link:green:usb1";
+ };
+
+ usb2 {
+ gpios = <&gpio0 4 1>; /* active low */
+ label = "tp-link:green:usb2";
+ };
+ };
+
+ buttons {
+ compatible = "gpio-keys";
+
+ reset {
+ label = "Reset button";
+ gpios = <&gpio0 5 1>; /* active low */
+ linux,code = <0x198>; /* KEY_RESTART */
+ };
+ };
+};
+
+/include/ "fsl/p1010si-post.dtsi"
diff --git a/target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c b/target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
new file mode 100644
index 0000000..95afa4d
--- /dev/null
+++ b/target/linux/mpc85xx/files/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
@@ -0,0 +1,145 @@
+/*
+ * TL-WDR4900 v1 board setup
+ *
+ * Copyright (c) 2013 Gabor Juhos <juhosg at openwrt.org>
+ *
+ * Based on:
+ * p1010rdb.c:
+ * P1010RDB Board Setup
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/of_platform.h>
+#include <linux/ath9k_platform.h>
+#include <linux/leds.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#include "mpc85xx.h"
+
+void __init tl_wdr4900_v1_pic_init(void)
+{
+ struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+ MPIC_SINGLE_DEST_CPU,
+ 0, 256, " OpenPIC ");
+
+ BUG_ON(mpic == NULL);
+
+ mpic_init(mpic);
+}
+
+#ifdef CONFIG_PCI
+static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
+ {
+ .name = "tp-link:blue:wps",
+ .gpio = 1,
+ .active_low = 1,
+ },
+};
+
+static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
+ .led_pin = 0,
+ .eeprom_name = "pci_wmac0.eeprom",
+ .leds = tl_wdr4900_v1_wmac_leds_gpio,
+ .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
+};
+
+static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
+ .led_pin = 0,
+ .eeprom_name = "pci_wmac1.eeprom",
+};
+
+static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
+{
+ if (!machine_is(tl_wdr4900_v1))
+ return;
+
+ if (dev->bus->number == 1 &&
+ PCI_SLOT(dev->devfn) == 0) {
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
+ return;
+ }
+
+ if (dev->bus->number == 3 &&
+ PCI_SLOT(dev->devfn) == 0 &&
+ dev->device == 0xabcd) {
+ dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
+
+ /*
+ * The PCI header of the AR9381 chip is not programmed
+ * correctly by the bootloader and the device uses wrong
+ * data due to that. Replace the broken values with the
+ * correct ones.
+ */
+ dev->device = 0x30;
+ dev->class = 0x028000;
+
+ pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
+ }
+}
+
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
+ tl_wdr4900_v1_pci_wmac_fixup);
+#endif /* CONFIG_PCI */
+
+/*
+ * Setup the architecture
+ */
+static void __init tl_wdr4900_v1_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
+
+ fsl_pci_assign_primary();
+
+ printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
+}
+
+machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
+machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init tl_wdr4900_v1_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
+ return 1;
+
+ return 0;
+}
+
+define_machine(tl_wdr4900_v1) {
+ .name = "Freescale P1014",
+ .probe = tl_wdr4900_v1_probe,
+ .setup_arch = tl_wdr4900_v1_setup_arch,
+ .init_IRQ = tl_wdr4900_v1_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/target/linux/mpc85xx/patches-3.18/140-powerpc-85xx-tl-wdr4900-v1-support.patch b/target/linux/mpc85xx/patches-3.18/140-powerpc-85xx-tl-wdr4900-v1-support.patch
index 6a6eeac..9b4815c 100644
--- a/target/linux/mpc85xx/patches-3.18/140-powerpc-85xx-tl-wdr4900-v1-support.patch
+++ b/target/linux/mpc85xx/patches-3.18/140-powerpc-85xx-tl-wdr4900-v1-support.patch
@@ -11,16 +11,9 @@ the Freescale P1014 SoC.
Signed-off-by: Gabor Juhos <juhosg at openwrt.org>
---
arch/powerpc/boot/Makefile | 3 +
- arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 164 +++++++++++++++++++++
- arch/powerpc/boot/dts/tl-wdr4900-v1.dts | 212 ++++++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/platforms/85xx/Kconfig | 11 ++
arch/powerpc/platforms/85xx/Makefile | 1 +
- arch/powerpc/platforms/85xx/tl_wdr4900_v1.c | 145 +++++++++++++++++++
- 7 files changed, 540 insertions(+)
- create mode 100644 arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
- create mode 100644 arch/powerpc/boot/dts/tl-wdr4900-v1.dts
- create mode 100644 arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -40,388 +33,6 @@ Signed-off-by: Gabor Juhos <juhosg at openwrt.org>
# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
image-$(CONFIG_STORCENTER) += cuImage.storcenter
---- /dev/null
-+++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
-@@ -0,0 +1,164 @@
-+/*
-+ * U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board
-+ *
-+ * Copyright (c) 2013 Gabor Juhos <juhosg at openwrt.org>
-+ *
-+ * Based on:
-+ * cuboot-85xx.c
-+ * Author: Scott Wood <scottwood at freescale.com>
-+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
-+ *
-+ * simpleboot.c
-+ * Authors: Scott Wood <scottwood at freescale.com>
-+ * Grant Likely <grant.likely at secretlab.ca>
-+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
-+ * Copyright (c) 2008 Secret Lab Technologies Ltd.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include "ops.h"
-+#include "types.h"
-+#include "io.h"
-+#include "stdio.h"
-+#include <libfdt.h>
-+
-+BSS_STACK(4*1024);
-+
-+static unsigned long bus_freq;
-+static unsigned long int_freq;
-+static u64 mem_size;
-+static unsigned char enetaddr[6];
-+
-+static void process_boot_dtb(void *boot_dtb)
-+{
-+ const u32 *na, *ns, *reg, *val32;
-+ const char *path;
-+ u64 memsize64;
-+ int node, size, i;
-+
-+ /* Make sure FDT blob is sane */
-+ if (fdt_check_header(boot_dtb) != 0)
-+ fatal("Invalid device tree blob\n");
-+
-+ /* Find the #address-cells and #size-cells properties */
-+ node = fdt_path_offset(boot_dtb, "/");
-+ if (node < 0)
-+ fatal("Cannot find root node\n");
-+ na = fdt_getprop(boot_dtb, node, "#address-cells", &size);
-+ if (!na || (size != 4))
-+ fatal("Cannot find #address-cells property");
-+
-+ ns = fdt_getprop(boot_dtb, node, "#size-cells", &size);
-+ if (!ns || (size != 4))
-+ fatal("Cannot find #size-cells property");
-+
-+ /* Find the memory range */
-+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
-+ "memory", sizeof("memory"));
-+ if (node < 0)
-+ fatal("Cannot find memory node\n");
-+ reg = fdt_getprop(boot_dtb, node, "reg", &size);
-+ if (size < (*na+*ns) * sizeof(u32))
-+ fatal("cannot get memory range\n");
-+
-+ /* Only interested in memory based at 0 */
-+ for (i = 0; i < *na; i++)
-+ if (*reg++ != 0)
-+ fatal("Memory range is not based at address 0\n");
-+
-+ /* get the memsize and trucate it to under 4G on 32 bit machines */
-+ memsize64 = 0;
-+ for (i = 0; i < *ns; i++)
-+ memsize64 = (memsize64 << 32) | *reg++;
-+ if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL)
-+ memsize64 = 0xffffffff;
-+
-+ mem_size = memsize64;
-+
-+ /* get clock frequencies */
-+ node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type",
-+ "cpu", sizeof("cpu"));
-+ if (!node)
-+ fatal("Cannot find cpu node\n");
-+
-+ val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size);
-+ if (!val32 || (size != 4))
-+ fatal("Cannot get clock frequency");
-+
-+ int_freq = *val32;
-+
-+ val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size);
-+ if (!val32 || (size != 4))
-+ fatal("Cannot get bus frequency");
-+
-+ bus_freq = *val32;
-+
-+ path = fdt_get_alias(boot_dtb, "ethernet0");
-+ if (path) {
-+ const void *p;
-+
-+ node = fdt_path_offset(boot_dtb, path);
-+ if (node < 0)
-+ fatal("Cannot find ethernet0 node");
-+
-+ p = fdt_getprop(boot_dtb, node, "mac-address", &size);
-+ if (!p || (size < 6)) {
-+ printf("no mac-address property, finding local\n\r");
-+ p = fdt_getprop(boot_dtb, node, "local-mac-address", &size);
-+ }
-+
-+ if (!p || (size < 6))
-+ fatal("cannot get MAC addres");
-+
-+ memcpy(enetaddr, p, sizeof(enetaddr));
-+ }
-+}
-+
-+static void platform_fixups(void)
-+{
-+ void *soc;
-+
-+ dt_fixup_memory(0, mem_size);
-+
-+ dt_fixup_mac_address_by_alias("ethernet0", enetaddr);
-+ dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq);
-+
-+ /* Unfortunately, the specific model number is encoded in the
-+ * soc node name in existing dts files -- once that is fixed,
-+ * this can do a simple path lookup.
-+ */
-+ soc = find_node_by_devtype(NULL, "soc");
-+ if (soc) {
-+ void *serial = NULL;
-+
-+ setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq));
-+
-+ while ((serial = find_node_by_devtype(serial, "serial"))) {
-+ if (get_parent(serial) != soc)
-+ continue;
-+
-+ setprop(serial, "clock-frequency", &bus_freq,
-+ sizeof(bus_freq));
-+ }
-+ }
-+}
-+
-+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
-+ unsigned long r6, unsigned long r7)
-+{
-+ mem_size = 64 * 1024 * 1024;
-+
-+ simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64);
-+
-+ fdt_init(_dtb_start);
-+ serial_console_init();
-+
-+ printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r");
-+
-+ process_boot_dtb((void *) r3);
-+
-+ platform_ops.fixups = platform_fixups;
-+}
---- /dev/null
-+++ b/arch/powerpc/boot/dts/tl-wdr4900-v1.dts
-@@ -0,0 +1,212 @@
-+/*
-+ * TP-Link TL-WDR4900 v1 Device Tree Source
-+ *
-+ * Copyright 2013 Gabor Juhos <juhosg at openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ */
-+
-+/include/ "fsl/p1010si-pre.dtsi"
-+
-+/ {
-+ model = "TP-Link TL-WDR4900 v1";
-+ compatible = "tp-link,TL-WDR4900v1";
-+
-+ chosen {
-+ bootargs = "console=ttyS0,115200";
-+/*
-+ linux,stdout-path = "/soc at ffe00000/serial at 4500";
-+*/
-+ };
-+
-+ aliases {
-+ spi0 = &spi0;
-+ };
-+
-+ memory {
-+ device_type = "memory";
-+ };
-+
-+ soc: soc at ffe00000 {
-+ ranges = <0x0 0x0 0xffe00000 0x100000>;
-+
-+ spi0: spi at 7000 {
-+ flash at 0 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "spansion,s25fl129p1";
-+ reg = <0>;
-+ spi-max-frequency = <25000000>;
-+
-+ u-boot at 0 {
-+ reg = <0x0 0x0050000>;
-+ label = "u-boot";
-+ read-only;
-+ };
-+
-+ dtb at 50000 {
-+ reg = <0x00050000 0x00010000>;
-+ label = "dtb";
-+ read-only;
-+ };
-+
-+ kernel at 60000 {
-+ reg = <0x00060000 0x002a0000>;
-+ label = "kernel";
-+ };
-+
-+ rootfs at 300000 {
-+ reg = <0x00300000 0x00ce0000>;
-+ label = "rootfs";
-+ };
-+
-+ config at fe0000 {
-+ reg = <0x00fe0000 0x00010000>;
-+ label = "config";
-+ read-only;
-+ };
-+
-+ caldata at ff0000 {
-+ reg = <0x00ff0000 0x00010000>;
-+ label = "caldata";
-+ read-only;
-+ };
-+
-+ firmware at 60000 {
-+ reg = <0x00060000 0x00f80000>;
-+ label = "firmware";
-+ };
-+ };
-+ };
-+
-+ gpio0: gpio-controller at f000 {
-+ };
-+
-+ usb at 22000 {
-+ phy_type = "utmi";
-+ dr_mode = "host";
-+ };
-+
-+ mdio at 24000 {
-+ phy0: ethernet-phy at 0 {
-+ reg = <0x0>;
-+ qca,ar8327-initvals = <
-+ 0x00004 0x07600000 /* PAD0_MODE */
-+ 0x00008 0x00000000 /* PAD5_MODE */
-+ 0x0000c 0x01000000 /* PAD6_MODE */
-+ 0x00010 0x40000000 /* POWER_ON_STRIP */
-+ 0x00050 0xcf35cf35 /* LED_CTRL0 */
-+ 0x00054 0xcf35cf35 /* LED_CTRL1 */
-+ 0x00058 0xcf35cf35 /* LED_CTRL2 */
-+ 0x0005c 0x03ffff00 /* LED_CTRL3 */
-+ 0x0007c 0x0000007e /* PORT0_STATUS */
-+ >;
-+ };
-+ };
-+
-+ mdio at 25000 {
-+ status = "disabled";
-+ };
-+
-+ mdio at 26000 {
-+ status = "disabled";
-+ };
-+
-+ enet0: ethernet at b0000 {
-+ phy-handle = <&phy0>;
-+ phy-connection-type = "rgmii-id";
-+ };
-+
-+ enet1: ethernet at b1000 {
-+ status = "disabled";
-+ };
-+
-+ enet2: ethernet at b2000 {
-+ status = "disabled";
-+ };
-+
-+ sdhc at 2e000 {
-+ status = "disabled";
-+ };
-+
-+ serial1: serial at 4600 {
-+ status = "disabled";
-+ };
-+
-+ can0: can at 1c000 {
-+ status = "disabled";
-+ };
-+
-+ can1: can at 1d000 {
-+ status = "disabled";
-+ };
-+ };
-+
-+ pci0: pcie at ffe09000 {
-+ reg = <0 0xffe09000 0 0x1000>;
-+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-+ pcie at 0 {
-+ ranges = <0x2000000 0x0 0xa0000000
-+ 0x2000000 0x0 0xa0000000
-+ 0x0 0x20000000
-+
-+ 0x1000000 0x0 0x0
-+ 0x1000000 0x0 0x0
-+ 0x0 0x100000>;
-+ };
-+ };
-+
-+ pci1: pcie at ffe0a000 {
-+ reg = <0 0xffe0a000 0 0x1000>;
-+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-+ pcie at 0 {
-+ ranges = <0x2000000 0x0 0x80000000
-+ 0x2000000 0x0 0x80000000
-+ 0x0 0x20000000
-+
-+ 0x1000000 0x0 0x0
-+ 0x1000000 0x0 0x0
-+ 0x0 0x100000>;
-+ };
-+ };
-+
-+ ifc: ifc at ffe1e000 {
-+ status = "disabled";
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ system {
-+ gpios = <&gpio0 2 1>; /* active low */
-+ label = "tp-link:blue:system";
-+ };
-+
-+ usb1 {
-+ gpios = <&gpio0 3 1>; /* active low */
-+ label = "tp-link:green:usb1";
-+ };
-+
-+ usb2 {
-+ gpios = <&gpio0 4 1>; /* active low */
-+ label = "tp-link:green:usb2";
-+ };
-+ };
-+
-+ buttons {
-+ compatible = "gpio-keys";
-+
-+ reset {
-+ label = "Reset button";
-+ gpios = <&gpio0 5 1>; /* active low */
-+ linux,code = <0x198>; /* KEY_RESTART */
-+ };
-+ };
-+};
-+
-+/include/ "fsl/p1010si-post.dtsi"
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -218,6 +218,10 @@ cuboot*)
@@ -465,151 +76,3 @@ Signed-off-by: Gabor Juhos <juhosg at openwrt.org>
obj-$(CONFIG_SBC8548) += sbc8548.o
obj-$(CONFIG_PPA8548) += ppa8548.o
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o
---- /dev/null
-+++ b/arch/powerpc/platforms/85xx/tl_wdr4900_v1.c
-@@ -0,0 +1,145 @@
-+/*
-+ * TL-WDR4900 v1 board setup
-+ *
-+ * Copyright (c) 2013 Gabor Juhos <juhosg at openwrt.org>
-+ *
-+ * Based on:
-+ * p1010rdb.c:
-+ * P1010RDB Board Setup
-+ * Copyright 2011 Freescale Semiconductor Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ */
-+
-+#include <linux/stddef.h>
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/delay.h>
-+#include <linux/interrupt.h>
-+#include <linux/of_platform.h>
-+#include <linux/ath9k_platform.h>
-+#include <linux/leds.h>
-+
-+#include <asm/time.h>
-+#include <asm/machdep.h>
-+#include <asm/pci-bridge.h>
-+#include <mm/mmu_decl.h>
-+#include <asm/prom.h>
-+#include <asm/udbg.h>
-+#include <asm/mpic.h>
-+
-+#include <sysdev/fsl_soc.h>
-+#include <sysdev/fsl_pci.h>
-+
-+#include "mpc85xx.h"
-+
-+void __init tl_wdr4900_v1_pic_init(void)
-+{
-+ struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
-+ MPIC_SINGLE_DEST_CPU,
-+ 0, 256, " OpenPIC ");
-+
-+ BUG_ON(mpic == NULL);
-+
-+ mpic_init(mpic);
-+}
-+
-+#ifdef CONFIG_PCI
-+static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = {
-+ {
-+ .name = "tp-link:blue:wps",
-+ .gpio = 1,
-+ .active_low = 1,
-+ },
-+};
-+
-+static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = {
-+ .led_pin = 0,
-+ .eeprom_name = "pci_wmac0.eeprom",
-+ .leds = tl_wdr4900_v1_wmac_leds_gpio,
-+ .num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio),
-+};
-+
-+static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = {
-+ .led_pin = 0,
-+ .eeprom_name = "pci_wmac1.eeprom",
-+};
-+
-+static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev)
-+{
-+ if (!machine_is(tl_wdr4900_v1))
-+ return;
-+
-+ if (dev->bus->number == 1 &&
-+ PCI_SLOT(dev->devfn) == 0) {
-+ dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data;
-+ return;
-+ }
-+
-+ if (dev->bus->number == 3 &&
-+ PCI_SLOT(dev->devfn) == 0 &&
-+ dev->device == 0xabcd) {
-+ dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data;
-+
-+ /*
-+ * The PCI header of the AR9381 chip is not programmed
-+ * correctly by the bootloader and the device uses wrong
-+ * data due to that. Replace the broken values with the
-+ * correct ones.
-+ */
-+ dev->device = 0x30;
-+ dev->class = 0x028000;
-+
-+ pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev));
-+ }
-+}
-+
-+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID,
-+ tl_wdr4900_v1_pci_wmac_fixup);
-+#endif /* CONFIG_PCI */
-+
-+/*
-+ * Setup the architecture
-+ */
-+static void __init tl_wdr4900_v1_setup_arch(void)
-+{
-+ if (ppc_md.progress)
-+ ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0);
-+
-+ fsl_pci_assign_primary();
-+
-+ printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n");
-+}
-+
-+machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
-+machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier);
-+
-+/*
-+ * Called very early, device-tree isn't unflattened
-+ */
-+static int __init tl_wdr4900_v1_probe(void)
-+{
-+ unsigned long root = of_get_flat_dt_root();
-+
-+ if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1"))
-+ return 1;
-+
-+ return 0;
-+}
-+
-+define_machine(tl_wdr4900_v1) {
-+ .name = "Freescale P1014",
-+ .probe = tl_wdr4900_v1_probe,
-+ .setup_arch = tl_wdr4900_v1_setup_arch,
-+ .init_IRQ = tl_wdr4900_v1_pic_init,
-+#ifdef CONFIG_PCI
-+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
-+#endif
-+ .get_irq = mpic_get_irq,
-+ .restart = fsl_rstcr_restart,
-+ .calibrate_decr = generic_calibrate_decr,
-+ .progress = udbg_progress,
-+};
diff --git a/target/linux/mpc85xx/patches-3.18/142-add-mpic-timer-clock-frequency.patch b/target/linux/mpc85xx/patches-3.18/142-add-mpic-timer-clock-frequency.patch
deleted file mode 100644
index cc5e4dd..0000000
--- a/target/linux/mpc85xx/patches-3.18/142-add-mpic-timer-clock-frequency.patch
+++ /dev/null
@@ -1,48 +0,0 @@
-From 1c20a5420c2602e2438209f34a633eae377eda5e Mon Sep 17 00:00:00 2001
-From: Heiner Kallweit <hkallweit1 at gmail.com>
-Date: Thu, 19 Feb 2015 23:43:32 +0100
-Subject: [PATCH] mpc85xx: add mpic timer clock frequency
-
-MPIC timers are enabled in the config, however a devicetree clock setting
-is missing causing the following error:
-/soc at ffe00000/timer at 41100: cannot get timer frequency.
-/soc at ffe00000/timer at 42100: cannot get timer frequency.
-
-This patch adds the missing clock and avoids the error.
-It's a functional copy of this code
-do_fixup_by_compat_u32(blob, "fsl,mpic",
- "clock-frequency", get_bus_freq(0), 1);
-in arch/powerpc/cpu/mpc85xx/fdt.c in the u-boot code.
-
-Signed-off-by: Heiner Kallweit <hkallweit1 at gmail.com>
----
- arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
-diff --git a/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
-index 095e777..17459ef 100644
---- a/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
-+++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
-@@ -119,7 +119,7 @@ static void process_boot_dtb(void *boot_dtb)
-
- static void platform_fixups(void)
- {
-- void *soc;
-+ void *soc, *mpic;
-
- dt_fixup_memory(0, mem_size);
-
-@@ -144,6 +144,10 @@ static void platform_fixups(void)
- sizeof(bus_freq));
- }
- }
-+
-+ mpic = find_node_by_compatible(NULL, "fsl,mpic");
-+ if (mpic)
-+ setprop(mpic, "clock-frequency", &bus_freq, sizeof(bus_freq));
- }
-
- void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
---
-2.3.0
-
--
2.3.7
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