[OpenWrt-Devel] AR8334 switch support
Heiner Kallweit
hkallweit1 at gmail.com
Mon Apr 27 14:56:20 EDT 2015
Am 27.04.2015 um 17:47 schrieb Christian Mehlis:
> Am 27.04.2015 um 15:06 schrieb Heiner Kallweit:
>> Could you please provide te dmesg output of this patch version?
>
> [ 0.850000] switch0: Atheros AR833X rev. 2 switch registered on ag71xx-mdio.0
> [ 0.860000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: PHY 0 available, BMSR = 0x7949
> [ 0.870000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: PHY 1 available, BMSR = 0x7949
> [ 0.870000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: PHY 2 available, BMSR = 0x7969
> [ 0.880000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: PHY 3 available, BMSR = 0x7949
> [ 0.890000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: PHY 4 available, BMSR = 0x7949
> [ 0.900000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: PHY 5 available, BMSR = 0xffff
> [ 0.910000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: PHY 6 available, BMSR = 0xffff
> [ 0.920000] Atheros AR8216/AR8236/AR8316 ag71xx-mdio.0:00: Detected AR8337 switch
>
> Best
> Christian
>
Thanks for testing. Seems like PHY's 0, 3 and 4 are there but just not connected to any pin on the chip.
So we have to look for something else to tell a 8334 from a 8337.
The only other difference I found is the initial setting of LED_CTRL3 register.
Could you please test the following patch (first remove the initial patch attempt)?
Rgds, Heiner
PS: I have no datasheet for AR8335 and don't know how LED_CTRL3 is set initially on this chip.
Therefore AR8335 might not work correctly. However no router with this chip is known yet.
---
target/linux/generic/files/drivers/net/phy/ar8216.h | 13 ++++++++++++-
target/linux/generic/files/drivers/net/phy/ar8327.c | 18 +++++++++++++++++-
2 files changed, 29 insertions(+), 2 deletions(-)
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h
index 0f53f23..a23c3be 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.h
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.h
@@ -405,6 +405,7 @@ struct ar8xxx_priv {
struct mutex reg_mutex;
u8 chip_ver;
u8 chip_rev;
+ u8 chip_subver;
const struct ar8xxx_chip *chip;
void *chip_data;
bool initialized;
@@ -562,11 +563,21 @@ static inline bool chip_is_ar8327(struct ar8xxx_priv *priv)
return priv->chip_ver == AR8XXX_VER_AR8327;
}
-static inline bool chip_is_ar8337(struct ar8xxx_priv *priv)
+static inline bool chip_is_ar833x(struct ar8xxx_priv *priv)
{
return priv->chip_ver == AR8XXX_VER_AR8337;
}
+static inline bool chip_is_ar8334(struct ar8xxx_priv *priv)
+{
+ return chip_is_ar833x(priv) && priv->chip_subver == 4;
+}
+
+static inline bool chip_is_ar8337(struct ar8xxx_priv *priv)
+{
+ return chip_is_ar833x(priv) && priv->chip_subver == 7;
+}
+
static inline void
ar8xxx_reg_set(struct ar8xxx_priv *priv, int reg, u32 val)
{
diff --git a/target/linux/generic/files/drivers/net/phy/ar8327.c b/target/linux/generic/files/drivers/net/phy/ar8327.c
index 07e837e..96f3378 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8327.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8327.c
@@ -621,6 +621,22 @@ static int
ar8327_hw_init(struct ar8xxx_priv *priv)
{
int ret;
+ u32 led_val;
+
+ if (chip_is_ar833x(priv)) {
+ led_val = ar8xxx_read(priv, AR8327_REG_LED_CTRL3);
+ /*
+ * no default LED pattern is set for PHY 1 on AR8334
+ * this code might not work correctly on AR8335
+ */
+ led_val = (led_val & BITS(8, 6)) >> 8;
+ dev_info(&priv->phy->dev, "led_val = %x\n", led_val);
+ if (led_val)
+ priv->chip_subver = 7;
+ else
+ priv->chip_subver = 4;
+ dev_info(&priv->phy->dev, "Detected AR833%d\n", priv->chip_subver);
+ }
priv->chip_data = kzalloc(sizeof(struct ar8327_data), GFP_KERNEL);
if (!priv->chip_data)
@@ -1206,7 +1222,7 @@ const struct ar8xxx_chip ar8337_chip = {
.config_at_probe = true,
.mii_lo_first = true,
- .name = "Atheros AR8337",
+ .name = "Atheros AR833X",
.ports = AR8327_NUM_PORTS,
.vlans = AR8X16_MAX_VLANS,
.swops = &ar8327_sw_ops,
--
2.3.5
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