[OpenWrt-Devel] [PATCH 2/3] ipq806x: add db149 dts files
Mathieu Olivari
mathieu at codeaurora.org
Mon Apr 20 21:18:28 EDT 2015
DB149 is an IPQ806x based development platform. This patch adds the dts
files to support it.
Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
---
.../ipq806x/patches-3.18/022-add-db149-dts.patch | 293 +++++++++++++++++++++
.../ipq806x/patches-4.0/022-add-db149-dts.patch | 293 +++++++++++++++++++++
2 files changed, 586 insertions(+)
create mode 100644 target/linux/ipq806x/patches-3.18/022-add-db149-dts.patch
create mode 100644 target/linux/ipq806x/patches-4.0/022-add-db149-dts.patch
diff --git a/target/linux/ipq806x/patches-3.18/022-add-db149-dts.patch b/target/linux/ipq806x/patches-3.18/022-add-db149-dts.patch
new file mode 100644
index 0000000..9a036fb
--- /dev/null
+++ b/target/linux/ipq806x/patches-3.18/022-add-db149-dts.patch
@@ -0,0 +1,293 @@
+From a32d6e7c8fca6371a2614924b89981bc912b6378 Mon Sep 17 00:00:00 2001
+From: Mathieu Olivari <mathieu at codeaurora.org>
+Date: Tue, 7 Apr 2015 19:58:58 -0700
+Subject: [PATCH] ARM: dts: qcom: add initial DB149 device-tree
+
+Add basic DB149 (IPQ806x based platform) device-tree. It supports UART,
+SATA, USB2, USB3 and NOR flash.
+
+Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/qcom-ipq8064-db149.dts | 257 +++++++++++++++++++++++++++++++
+ 2 files changed, 258 insertions(+)
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8064-db149.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 38c89ca..745360a 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -360,6 +360,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+ qcom-apq8084-ifc6540.dtb \
+ qcom-apq8084-mtp.dtb \
+ qcom-ipq8064-ap148.dtb \
++ qcom-ipq8064-db149.dtb \
+ qcom-msm8660-surf.dtb \
+ qcom-msm8960-cdp.dtb \
+ qcom-msm8974-sony-xperia-honami.dtb
+diff --git a/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
+new file mode 100644
+index 0000000..224c54f
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
+@@ -0,0 +1,257 @@
++#include "qcom-ipq8064-v1.0.dtsi"
++
++/ {
++ model = "Qualcomm IPQ8064/DB149";
++ compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
++
++ reserved-memory {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++ rsvd at 41200000 {
++ reg = <0x41200000 0x300000>;
++ no-map;
++ };
++ };
++
++ alias {
++ serial0 = &uart2;
++ };
++
++ chosen {
++ linux,stdout-path = "serial0:115200n8";
++ };
++
++ aliases {
++ mdio-gpio0 = &mdio0;
++ };
++
++ soc {
++ pinmux at 800000 {
++ pinctrl-0 = <&mdio0_pins &rgmii0_pinmux>;
++ pinctrl-names = "default";
++
++ i2c4_pins: i2c4_pinmux {
++ pins = "gpio12", "gpio13";
++ function = "gsbi4";
++ bias-disable;
++ };
++
++ spi_pins: spi_pins {
++ mux {
++ pins = "gpio18", "gpio19", "gpio21";
++ function = "gsbi5";
++ drive-strength = <10>;
++ bias-none;
++ };
++ };
++
++ mdio0_pins: mdio0_pins {
++ mux {
++ pins = "gpio0", "gpio1";
++ function = "gpio";
++ drive-strength = <8>;
++ bias-disable;
++ };
++ };
++
++ rgmii0_pinmux: rgmii0_pinmux {
++ mux {
++ pins = "gpio2", "gpio66";
++ drive-strength = <8>;
++ bias-disable;
++ };
++ };
++ };
++
++ gsbi2: gsbi at 12480000 {
++ qcom,mode = <GSBI_PROT_I2C_UART>;
++ status = "ok";
++ uart2: serial at 12490000 {
++ status = "ok";
++ };
++ };
++
++ gsbi5: gsbi at 1a200000 {
++ qcom,mode = <GSBI_PROT_SPI>;
++ status = "ok";
++
++ spi4: spi at 1a280000 {
++ status = "ok";
++ spi-max-frequency = <50000000>;
++
++ pinctrl-0 = <&spi_pins>;
++ pinctrl-names = "default";
++
++ cs-gpios = <&qcom_pinmux 20 0>;
++
++ flash: m25p80 at 0 {
++ compatible = "s25fl256s1";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ spi-max-frequency = <50000000>;
++ reg = <0>;
++ m25p,fast-read;
++
++ partition at 0 {
++ label = "lowlevel_init";
++ reg = <0x0 0x1b0000>;
++ };
++
++ partition at 1 {
++ label = "u-boot";
++ reg = <0x1b0000 0x80000>;
++ };
++
++ partition at 2 {
++ label = "u-boot-env";
++ reg = <0x230000 0x40000>;
++ };
++
++ partition at 3 {
++ label = "caldata";
++ reg = <0x270000 0x40000>;
++ };
++
++ partition at 4 {
++ label = "firmware";
++ reg = <0x2b0000 0x1d50000>;
++ };
++ };
++ };
++ };
++
++ sata-phy at 1b400000 {
++ status = "ok";
++ };
++
++ sata at 29000000 {
++ status = "ok";
++ };
++
++ phy at 100f8800 { /* USB3 port 1 HS phy */
++ status = "ok";
++ };
++
++ phy at 100f8830 { /* USB3 port 1 SS phy */
++ status = "ok";
++ };
++
++ phy at 110f8800 { /* USB3 port 0 HS phy */
++ status = "ok";
++ };
++
++ phy at 110f8830 { /* USB3 port 0 SS phy */
++ status = "ok";
++ };
++
++ usb30 at 0 {
++ status = "ok";
++ };
++
++ usb30 at 1 {
++ status = "ok";
++ };
++
++ mdio0: mdio {
++ compatible = "virtual,mdio-gpio";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
++
++ phy0: ethernet-phy at 0 {
++ device_type = "ethernet-phy";
++ reg = <0>;
++ qca,ar8327-initvals = <
++ 0x00004 0x7600000 /* PAD0_MODE */
++ 0x00008 0x1000000 /* PAD5_MODE */
++ 0x0000c 0x80 /* PAD6_MODE */
++ 0x000e4 0xaa545 /* MAC_POWER_SEL */
++ 0x000e0 0xc74164de /* SGMII_CTRL */
++ 0x0007c 0x4e /* PORT0_STATUS */
++ 0x00094 0x4e /* PORT6_STATUS */
++ >;
++ };
++
++ phy4: ethernet-phy at 4 {
++ device_type = "ethernet-phy";
++ reg = <4>;
++ };
++
++ phy6: ethernet-phy at 6 {
++ device_type = "ethernet-phy";
++ reg = <6>;
++ };
++
++ phy7: ethernet-phy at 7 {
++ device_type = "ethernet-phy";
++ reg = <7>;
++ };
++ };
++
++ nss-gmac-common {
++ reg = <0x03000000 0x0000FFFF 0x1bb00000 0x0000FFFF 0x00900000 0x00004000>;
++ reg-names = "nss_reg_base" , "qsgmii_reg_base", "clk_ctl_base";
++ };
++
++ gmac0: ethernet at 37000000 {
++ status = "ok";
++ phy-mode = "rgmii";
++ qcom,id = <0>;
++ qcom,phy_mdio_addr = <4>;
++ qcom,poll_required = <1>;
++ qcom,rgmii_delay = <1>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <1000>;
++ qcom,forced_duplex = <1>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++
++ gmac1: ethernet at 37200000 {
++ status = "ok";
++ phy-mode = "sgmii";
++ qcom,id = <1>;
++ qcom,phy_mdio_addr = <0>;
++ qcom,poll_required = <0>;
++ qcom,rgmii_delay = <0>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <1000>;
++ qcom,forced_duplex = <1>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++
++ gmac2: ethernet at 37400000 {
++ status = "ok";
++ phy-mode = "sgmii";
++ qcom,id = <2>;
++ qcom,phy_mdio_addr = <6>;
++ qcom,poll_required = <1>;
++ qcom,rgmii_delay = <0>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <0>;
++ qcom,forced_duplex = <0>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++
++ gmac3: ethernet at 37600000 {
++ status = "ok";
++ phy-mode = "sgmii";
++ qcom,id = <3>;
++ qcom,phy_mdio_addr = <7>;
++ qcom,poll_required = <1>;
++ qcom,rgmii_delay = <0>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <0>;
++ qcom,forced_duplex = <0>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++ };
++};
+--
+1.9.1
+
diff --git a/target/linux/ipq806x/patches-4.0/022-add-db149-dts.patch b/target/linux/ipq806x/patches-4.0/022-add-db149-dts.patch
new file mode 100644
index 0000000..9a036fb
--- /dev/null
+++ b/target/linux/ipq806x/patches-4.0/022-add-db149-dts.patch
@@ -0,0 +1,293 @@
+From a32d6e7c8fca6371a2614924b89981bc912b6378 Mon Sep 17 00:00:00 2001
+From: Mathieu Olivari <mathieu at codeaurora.org>
+Date: Tue, 7 Apr 2015 19:58:58 -0700
+Subject: [PATCH] ARM: dts: qcom: add initial DB149 device-tree
+
+Add basic DB149 (IPQ806x based platform) device-tree. It supports UART,
+SATA, USB2, USB3 and NOR flash.
+
+Signed-off-by: Mathieu Olivari <mathieu at codeaurora.org>
+---
+ arch/arm/boot/dts/Makefile | 1 +
+ arch/arm/boot/dts/qcom-ipq8064-db149.dts | 257 +++++++++++++++++++++++++++++++
+ 2 files changed, 258 insertions(+)
+ create mode 100644 arch/arm/boot/dts/qcom-ipq8064-db149.dts
+
+diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
+index 38c89ca..745360a 100644
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -360,6 +360,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
+ qcom-apq8084-ifc6540.dtb \
+ qcom-apq8084-mtp.dtb \
+ qcom-ipq8064-ap148.dtb \
++ qcom-ipq8064-db149.dtb \
+ qcom-msm8660-surf.dtb \
+ qcom-msm8960-cdp.dtb \
+ qcom-msm8974-sony-xperia-honami.dtb
+diff --git a/arch/arm/boot/dts/qcom-ipq8064-db149.dts b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
+new file mode 100644
+index 0000000..224c54f
+--- /dev/null
++++ b/arch/arm/boot/dts/qcom-ipq8064-db149.dts
+@@ -0,0 +1,257 @@
++#include "qcom-ipq8064-v1.0.dtsi"
++
++/ {
++ model = "Qualcomm IPQ8064/DB149";
++ compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
++
++ reserved-memory {
++ #address-cells = <1>;
++ #size-cells = <1>;
++ ranges;
++ rsvd at 41200000 {
++ reg = <0x41200000 0x300000>;
++ no-map;
++ };
++ };
++
++ alias {
++ serial0 = &uart2;
++ };
++
++ chosen {
++ linux,stdout-path = "serial0:115200n8";
++ };
++
++ aliases {
++ mdio-gpio0 = &mdio0;
++ };
++
++ soc {
++ pinmux at 800000 {
++ pinctrl-0 = <&mdio0_pins &rgmii0_pinmux>;
++ pinctrl-names = "default";
++
++ i2c4_pins: i2c4_pinmux {
++ pins = "gpio12", "gpio13";
++ function = "gsbi4";
++ bias-disable;
++ };
++
++ spi_pins: spi_pins {
++ mux {
++ pins = "gpio18", "gpio19", "gpio21";
++ function = "gsbi5";
++ drive-strength = <10>;
++ bias-none;
++ };
++ };
++
++ mdio0_pins: mdio0_pins {
++ mux {
++ pins = "gpio0", "gpio1";
++ function = "gpio";
++ drive-strength = <8>;
++ bias-disable;
++ };
++ };
++
++ rgmii0_pinmux: rgmii0_pinmux {
++ mux {
++ pins = "gpio2", "gpio66";
++ drive-strength = <8>;
++ bias-disable;
++ };
++ };
++ };
++
++ gsbi2: gsbi at 12480000 {
++ qcom,mode = <GSBI_PROT_I2C_UART>;
++ status = "ok";
++ uart2: serial at 12490000 {
++ status = "ok";
++ };
++ };
++
++ gsbi5: gsbi at 1a200000 {
++ qcom,mode = <GSBI_PROT_SPI>;
++ status = "ok";
++
++ spi4: spi at 1a280000 {
++ status = "ok";
++ spi-max-frequency = <50000000>;
++
++ pinctrl-0 = <&spi_pins>;
++ pinctrl-names = "default";
++
++ cs-gpios = <&qcom_pinmux 20 0>;
++
++ flash: m25p80 at 0 {
++ compatible = "s25fl256s1";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ spi-max-frequency = <50000000>;
++ reg = <0>;
++ m25p,fast-read;
++
++ partition at 0 {
++ label = "lowlevel_init";
++ reg = <0x0 0x1b0000>;
++ };
++
++ partition at 1 {
++ label = "u-boot";
++ reg = <0x1b0000 0x80000>;
++ };
++
++ partition at 2 {
++ label = "u-boot-env";
++ reg = <0x230000 0x40000>;
++ };
++
++ partition at 3 {
++ label = "caldata";
++ reg = <0x270000 0x40000>;
++ };
++
++ partition at 4 {
++ label = "firmware";
++ reg = <0x2b0000 0x1d50000>;
++ };
++ };
++ };
++ };
++
++ sata-phy at 1b400000 {
++ status = "ok";
++ };
++
++ sata at 29000000 {
++ status = "ok";
++ };
++
++ phy at 100f8800 { /* USB3 port 1 HS phy */
++ status = "ok";
++ };
++
++ phy at 100f8830 { /* USB3 port 1 SS phy */
++ status = "ok";
++ };
++
++ phy at 110f8800 { /* USB3 port 0 HS phy */
++ status = "ok";
++ };
++
++ phy at 110f8830 { /* USB3 port 0 SS phy */
++ status = "ok";
++ };
++
++ usb30 at 0 {
++ status = "ok";
++ };
++
++ usb30 at 1 {
++ status = "ok";
++ };
++
++ mdio0: mdio {
++ compatible = "virtual,mdio-gpio";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
++
++ phy0: ethernet-phy at 0 {
++ device_type = "ethernet-phy";
++ reg = <0>;
++ qca,ar8327-initvals = <
++ 0x00004 0x7600000 /* PAD0_MODE */
++ 0x00008 0x1000000 /* PAD5_MODE */
++ 0x0000c 0x80 /* PAD6_MODE */
++ 0x000e4 0xaa545 /* MAC_POWER_SEL */
++ 0x000e0 0xc74164de /* SGMII_CTRL */
++ 0x0007c 0x4e /* PORT0_STATUS */
++ 0x00094 0x4e /* PORT6_STATUS */
++ >;
++ };
++
++ phy4: ethernet-phy at 4 {
++ device_type = "ethernet-phy";
++ reg = <4>;
++ };
++
++ phy6: ethernet-phy at 6 {
++ device_type = "ethernet-phy";
++ reg = <6>;
++ };
++
++ phy7: ethernet-phy at 7 {
++ device_type = "ethernet-phy";
++ reg = <7>;
++ };
++ };
++
++ nss-gmac-common {
++ reg = <0x03000000 0x0000FFFF 0x1bb00000 0x0000FFFF 0x00900000 0x00004000>;
++ reg-names = "nss_reg_base" , "qsgmii_reg_base", "clk_ctl_base";
++ };
++
++ gmac0: ethernet at 37000000 {
++ status = "ok";
++ phy-mode = "rgmii";
++ qcom,id = <0>;
++ qcom,phy_mdio_addr = <4>;
++ qcom,poll_required = <1>;
++ qcom,rgmii_delay = <1>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <1000>;
++ qcom,forced_duplex = <1>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++
++ gmac1: ethernet at 37200000 {
++ status = "ok";
++ phy-mode = "sgmii";
++ qcom,id = <1>;
++ qcom,phy_mdio_addr = <0>;
++ qcom,poll_required = <0>;
++ qcom,rgmii_delay = <0>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <1000>;
++ qcom,forced_duplex = <1>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++
++ gmac2: ethernet at 37400000 {
++ status = "ok";
++ phy-mode = "sgmii";
++ qcom,id = <2>;
++ qcom,phy_mdio_addr = <6>;
++ qcom,poll_required = <1>;
++ qcom,rgmii_delay = <0>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <0>;
++ qcom,forced_duplex = <0>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++
++ gmac3: ethernet at 37600000 {
++ status = "ok";
++ phy-mode = "sgmii";
++ qcom,id = <3>;
++ qcom,phy_mdio_addr = <7>;
++ qcom,poll_required = <1>;
++ qcom,rgmii_delay = <0>;
++ qcom,emulation = <0>;
++ qcom,forced_speed = <0>;
++ qcom,forced_duplex = <0>;
++ qcom,socver = <0>;
++ local-mac-address = [000000000000];
++ mdiobus = <&mdio0>;
++ };
++ };
++};
+--
+1.9.1
+
--
1.9.1
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