[OpenWrt-Devel] [PATCH 1/8] BB (BACKPORT) - vgv7519: backport vgv7519 dts
Eddi De Pieri
eddi at depieri.net
Fri Oct 10 15:19:00 EDT 2014
Signed-off-by: Eddi De Pieri <eddi at depieri.net>
---
target/linux/lantiq/dts/VGV7519.dtsi | 53 ++++++++++++++++----------------
target/linux/lantiq/dts/VGV7519BRN.dts | 6 ++++
target/linux/lantiq/dts/VGV7519NOR.dts | 6 ++++
3 files changed, 38 insertions(+), 27 deletions(-)
diff --git a/target/linux/lantiq/dts/VGV7519.dtsi b/target/linux/lantiq/dts/VGV7519.dtsi
index 3f56d82..05c8aea 100644
--- a/target/linux/lantiq/dts/VGV7519.dtsi
+++ b/target/linux/lantiq/dts/VGV7519.dtsi
@@ -38,43 +38,41 @@
reg = <0xE100B10 0xA0>;
state_default: pinmux {
- exin3 {
- lantiq,groups = "exin3";
- lantiq,function = "exin";
- };
stp {
lantiq,groups = "stp";
lantiq,function = "stp";
};
spi {
- lantiq,groups = "spi", "spi_cs4";
+ lantiq,groups = "spi";
lantiq,function = "spi";
};
mdio {
lantiq,groups = "mdio";
lantiq,function = "mdio";
};
- pci {
- lantiq,groups = "gnt1", "req1";
- lantiq,function = "pci";
- };
- conf_out {
- lantiq,pins = "io4", "io5", "io6", /* stp */
- "io21",
- "io33",
- "io7", "io44"; /* Internal ethernet phy leds */
- lantiq,open-drain;
+ gphy-leds_out {
+ lantiq,pins = "io7", "io44";
lantiq,pull = <0>;
lantiq,output = <1>;
};
- pcie-rst {
- lantiq,pins = "io38";
+ stp_out {
+ lantiq,pins = "io4", "io5", "io6";
+ lantiq,open-drain = <0>;
+ lantiq,output = <1>;
+ lantiq,pull = <0>;
+ };
+ pci-rst {
+ lantiq,pins = "io21";
+ lantiq,open-drain = <0>;
lantiq,pull = <0>;
lantiq,output = <1>;
};
- conf_in {
- lantiq,pins = "io39"; /* exin3 */
- lantiq,pull = <2>;
+ gphy-leds {
+ lantiq,groups = "gphy0 led1", "gphy1 led0";
+ lantiq,function = "gphy";
+ lantiq,open-drain = <0>;
+ lantiq,pull = <0>;
+ lantiq,output = <1>;
};
};
};
@@ -146,27 +144,22 @@
phy0: ethernet-phy at 0 {
reg = <0x0>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy1: ethernet-phy at 1 {
reg = <0x1>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy5: ethernet-phy at 5 {
reg = <0x5>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy11: ethernet-phy at 11 {
reg = <0x11>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
phy13: ethernet-phy at 13 {
reg = <0x13>;
compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,c45-reg-init = <1 0 0 0>;
};
};
};
@@ -192,10 +185,11 @@
};
pci at E105400 {
+ status = "okay";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
- compatible = "lantiq,pci-xway1";
+ compatible = "lantiq,pci-xway";
bus-range = <0x0 0x0>;
ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
@@ -209,7 +203,7 @@
interrupt-map = <
0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
>;
- gpios-reset = <&gpio 21 0>;
+ gpio-reset = <&gpio 21 0>;
req-mask = <0x1>; /* GNT1 */
};
};
@@ -220,6 +214,11 @@
phys = [ 00 01 ];
};
+ ralink_eep {
+ compatible = "ralink,eeprom";
+ ralink,eeprom = "RT2860.eeprom";
+ };
+
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
diff --git a/target/linux/lantiq/dts/VGV7519BRN.dts b/target/linux/lantiq/dts/VGV7519BRN.dts
index 53692a3..b885952 100644
--- a/target/linux/lantiq/dts/VGV7519BRN.dts
+++ b/target/linux/lantiq/dts/VGV7519BRN.dts
@@ -22,6 +22,12 @@
label = "rootfs_data";
reg = <0x880000 0x780000>;
};
+
+ partition at 1f80000 {
+ label = "board_config";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
};
};
};
diff --git a/target/linux/lantiq/dts/VGV7519NOR.dts b/target/linux/lantiq/dts/VGV7519NOR.dts
index 283aa19..744efe6 100644
--- a/target/linux/lantiq/dts/VGV7519NOR.dts
+++ b/target/linux/lantiq/dts/VGV7519NOR.dts
@@ -30,6 +30,12 @@
// 0x1b0000 - 0x1000000 : rootfs (squashfs)
// 0x390000 - 0x1000000 : rootfs_data
};
+
+ partition at 1f80000 {
+ label = "board_config";
+ reg = <0x40000 0x10000>;
+ read-only;
+ };
};
};
};
--
1.7.10.4
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